summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/Sparc/SparcInternals.h
Commit message (Collapse)AuthorAgeFilesLines
* Great renaming: Sparc --> SparcV9Brian Gaeke2004-02-251-134/+0
| | | | llvm-svn: 11826
* Hoist some sparc specific code into the sparc targetChris Lattner2003-12-201-0/+2
| | | | llvm-svn: 10554
* Reorganized the Sparc backend to be more modular -- each differentMisha Brukman2003-12-171-576/+7
| | | | | | | | | | | | | implementation of a Target{RegInfo, InstrInfo, Machine, etc} now has a separate header and a separate implementation file. This means that instead of a massive SparcInternals.h that forces a recompilation of the whole target whenever a minor detail is changed, you should only recompile a few files. Note that SparcInternals.h is still around; its contents should be minimized. llvm-svn: 10500
* The functions to create new instances of passes are no longer methods in theMisha Brukman2003-11-131-15/+16
| | | | | | UltraSparc class. Comments are also doxygen-compatible now. llvm-svn: 9951
* Put all LLVM code into the llvm namespace, as per bug 109.Brian Gaeke2003-11-111-0/+4
| | | | llvm-svn: 9903
* PreSelection and PeepholeOpts are now FunctionPasses.Misha Brukman2003-11-071-2/+2
| | | | llvm-svn: 9774
* Added LLVM copyright header.John Criswell2003-10-211-0/+7
| | | | llvm-svn: 9321
* Goodbye, AddRegNumToValuesBrian Gaeke2003-10-201-6/+0
| | | | llvm-svn: 9309
* Make replaceMachineCodeForFunction() return void.Brian Gaeke2003-10-201-1/+1
| | | | llvm-svn: 9289
* Add prototype for replaceMachineCodeForFunction().Brian Gaeke2003-10-171-0/+1
| | | | llvm-svn: 9202
* Fix a typo in Sparc.cpp.Brian Gaeke2003-09-181-4/+2
| | | | | | | Update names of some pass creator fns in addPassesToEmitAssembly(). FunctionInfo is gone. llvm-svn: 8599
* No longer provide an optinfo, noone uses itChris Lattner2003-09-011-16/+0
| | | | llvm-svn: 8311
* Move private interfaces into private .h fileChris Lattner2003-09-011-0/+7
| | | | llvm-svn: 8306
* Unbreak SPARC backend: addPassesToJITCompile andBrian Gaeke2003-08-141-3/+3
| | | | | | | addPassesToEmitMachineCode now both take a FunctionPassManager. Factory methods for function passes now return type FunctionPass *. llvm-svn: 7835
* Adjust files for move of mapping info stuff into the Sparc directoryChris Lattner2003-08-131-1/+6
| | | | llvm-svn: 7802
* Add ConvertConstantToIntType() to unify all constant handlingVikram S. Adve2003-07-291-50/+16
| | | | | | | | | that depends on machine register size. Moved insertCallerSavingCode() to PhyRegAlloc and moved isRegVolatile and modifiedByCall to TargetRegInfo: they are all machine independent. Remove several dead functions. llvm-svn: 7392
* (1) Major fix to the way unused regs. are marked and found for the FPVikram S. Adve2003-07-251-16/+12
| | | | | | | | | | | | | Single and FP double reg types (which share the same reg class). Now all methods marking/finding unused regs consider the regType within the reg class, and SparcFloatRegClass specializes this code. (2) Remove machine-specific regalloc. methods that are no longer needed. In particular, arguments and return value from a call do not need machine-specific code for allocation. (3) Rename TargetRegInfo::getRegType variants to avoid unintentional overloading when an include file is omitted. llvm-svn: 7334
* Added special consideration for instrumentation strategyAnand Shukla2003-07-201-0/+4
| | | | llvm-svn: 7208
* Moved RegClassIDs enum to be next to the RegTypes enum.Misha Brukman2003-07-071-14/+14
| | | | llvm-svn: 7114
* Make the RegClassID values public -- there is no other way to get them.Vikram S. Adve2003-07-061-4/+6
| | | | llvm-svn: 7109
* Merged in autoconf branch. This provides configuration via the autoconfJohn Criswell2003-06-301-1/+1
| | | | | | system. llvm-svn: 7014
* move contents of include/llvm/Reoptimizer/Mapping/FInfo.h into here, it is ↵Chris Lattner2003-06-161-0/+2
| | | | | | sparc internal llvm-svn: 6711
* Extensive changes to the way code generation occurs for functionVikram S. Adve2003-05-311-27/+14
| | | | | | | | | | | | | | call arguments and return values: Now all copy operations before and after a call are generated during selection instead of during register allocation. The values are copied to virtual registers (or to the stack), but in the former case these operands are marked with the correct physical registers according to the calling convention. Although this complicates scheduling and does not work well with live range analysis, it simplifies the machine-dependent part of register allocation. llvm-svn: 6465
* The register types need to be visible outside of the class to be useful.Misha Brukman2003-05-301-14/+13
| | | | | | For one, converting register numbers based on class in the code emitter. llvm-svn: 6447
* Added the 'r' and 'i' annotations to instructions as their opcode names haveMisha Brukman2003-05-271-3/+3
| | | | | | changed. llvm-svn: 6380
* Add prototypes to add passes to JIT compilation and code emission.Misha Brukman2003-05-271-8/+17
| | | | | | | | Also, added annotations to how instructions are modified (reg/imm operands). Added prototype for adding register numbers to values pass for interfacing with the target-independent register allocators in the JIT. llvm-svn: 6366
* Added special register class containing (for now) %fsr.Vikram S. Adve2003-05-271-52/+8
| | | | | | | | Fixed spilling of %fcc[0-3] which are part of %fsr. Moved some machine-independent reg-class code to class TargetRegInfo from SparcReg{Class,}Info. llvm-svn: 6339
* Add support for compiling varargs functions.Vikram S. Adve2003-05-251-2/+2
| | | | llvm-svn: 6325
* Reword to remove reference to how things worked in the past.Misha Brukman2003-05-241-4/+3
| | | | llvm-svn: 6323
* Implement the TargetInstrInfo's createNOPinstr() and isNOPinstr() interface.Misha Brukman2003-05-241-0/+29
| | | | llvm-svn: 6320
* Sparc instruction opcodes now all live under the `V9' namespace.Misha Brukman2003-05-201-20/+24
| | | | llvm-svn: 6249
* Move sparc specific code into the Sparc backendChris Lattner2003-01-151-0/+2
| | | | llvm-svn: 5317
* Adjust to simpler interfacesChris Lattner2003-01-151-14/+1
| | | | | | Eliminate dependency on RegClass.h llvm-svn: 5315
* Rename MachineInstrInfo -> TargetInstrInfoChris Lattner2003-01-141-5/+5
| | | | llvm-svn: 5272
* More renamings of Target/Machine*Info to Target/Target*InfoChris Lattner2002-12-291-7/+7
| | | | llvm-svn: 5204
* Rename MachineOptInfo to TargetoptInfoChris Lattner2002-12-291-10/+8
| | | | | | Rename MachineCacheInfo to TargetCacheInfo llvm-svn: 5202
* Rename MachineFrameInfo to TargetFrameInfo.hChris Lattner2002-12-281-1/+1
| | | | llvm-svn: 5199
* * Rename MachineFrameInfo to TargetFrameInfoChris Lattner2002-12-281-4/+28
| | | | | | * Move some sparc specific code here from Target files llvm-svn: 5176
* These are no longer virtual methodsChris Lattner2002-10-291-5/+5
| | | | llvm-svn: 4420
* Allow TargetMachine to refuse static code genChris Lattner2002-10-291-1/+1
| | | | llvm-svn: 4415
* MachineInstrInfo doesn't need a TargetMachineChris Lattner2002-10-291-1/+1
| | | | llvm-svn: 4372
* Remove all traces of the "Opcode Mask" field in the MachineInstr classChris Lattner2002-10-281-7/+0
| | | | llvm-svn: 4359
* Move addPassesToEmitAssembly from TargetMachine to UltraSparc because itChris Lattner2002-10-281-1/+2
| | | | | | really is sparc specific. llvm-svn: 4308
* Changed `MachineCodeForMethod' to `MachineFunction'.Misha Brukman2002-10-281-7/+7
| | | | llvm-svn: 4301
* Eliminate duplicate target pointer in SparcRegInfo.Vikram S. Adve2002-10-131-11/+0
| | | | llvm-svn: 4129
* Simplified code that handles call args and rets, so it no longerVikram S. Adve2002-09-281-4/+2
| | | | | | needs the RegClass list to be passed in. llvm-svn: 3964
* Modify operand order for Create{Sign,Zero}ExtensionInstructions.Vikram S. Adve2002-09-271-4/+4
| | | | llvm-svn: 3960
* Added class MachineOptInfo as interface to target-specificVikram S. Adve2002-09-201-2/+25
| | | | | | | routines supporting machine code optimization. Also added method MachineInstrInfo::getNOPOpCode(). llvm-svn: 3845
* Move all the code that creates code generation passes from Sparc.cpp toVikram S. Adve2002-09-161-15/+77
| | | | | | | | TargetMachine.cpp, since it is entirely machine-independent. Also, add options to disable optional back-end passes (preselection and instr. scheduling). llvm-svn: 3740
* Add new function UltraSparcInstrInfo::CreateZeroExtensionInstructions.Vikram S. Adve2002-09-051-1/+17
| | | | llvm-svn: 3581
OpenPOWER on IntegriCloud