Checkin changes to:

1. Clean up the TargetMachine structure.  No more wierd pointers that have to
   be cast around and taken care of by the target.
2. Instruction Scheduling now takes the schedinfo as an argument.  The same
   should be done with the instinfo, it just isn't now.

llvm-svn: 565

1 files changed, 30 insertions, 1 deletions

diff --git a/llvm/lib/Target/Sparc/SparcInternals.h b/llvm/lib/Target/Sparc/SparcInternals.h
index df290d63e72..606966db731 100644
--- a/llvm/lib/Target/Sparc/SparcInternals.h
+++ b/llvm/lib/Target/Sparc/SparcInternals.h
@@ -8,12 +8,14 @@
 #ifndef SPARC_INTERNALS_H
 #define SPARC_INTERNALS_H
 
-#include "llvm/CodeGen/Sparc.h"
+#include "llvm/CodeGen/TargetMachine.h"
 #include "SparcRegInfo.h"
 
 #include <sys/types.h>
 #include "llvm/Type.h"
 
+class UltraSparc;
+
 // OpCodeMask definitions for the Sparc V9
 // 
 const OpCodeMask	Immed		= 0x00002000; // immed or reg operand?
@@ -1664,4 +1666,31 @@ protected:
   virtual void	initializeResources	();
 };
 
+
+//---------------------------------------------------------------------------
+// class UltraSparcMachine 
+// 
+// Purpose:
+//   Primary interface to machine description for the UltraSPARC.
+//   Primarily just initializes machine-dependent parameters in
+//   class TargetMachine, and creates machine-dependent subclasses
+//   for classes such as MachineInstrInfo. 
+//---------------------------------------------------------------------------
+
+class UltraSparc : public TargetMachine {
+  UltraSparcInstrInfo InstInfo;
+  UltraSparcSchedInfo InstSchedulingInfo;
+public:
+  UltraSparc();
+  virtual ~UltraSparc() {}
+
+  virtual const MachineInstrInfo& getInstrInfo() const { return InstInfo; }
+
+  // compileMethod - For the sparc, we do instruction selection, followed by
+  // delay slot scheduling, then register allocation.
+  //
+  virtual bool compileMethod(Method *M);
+};
+
+
 #endif