summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/Sparc/Disassembler
Commit message (Expand)AuthorAgeFilesLines
* CMake: Make most target symbols hidden by defaultTom Stellard2020-01-141-1/+1
* [Disassembler] Delete the VStream parameter of MCDisassembler::getInstruction()Fangrui Song2020-01-111-2/+0
* [cmake] Explicitly mark libraries defined in lib/ as "Component Libraries"Tom Stellard2019-11-211-1/+1
* Revert CMake: Make most target symbols hidden by defaultTom Stellard2019-06-111-1/+1
* CMake: Make most target symbols hidden by defaultTom Stellard2019-06-101-1/+1
* [Sparc] Create a TargetInfo header. NFCRichard Trieu2019-05-151-6/+1
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-192-8/+6
* [Target] Untangle disassemblersBenjamin Kramer2018-09-101-3/+1
* Remove trailing spaceFangrui Song2018-07-301-4/+4
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-2/+2
* Move the global variables representing each Target behind accessor functionMehdi Amini2016-10-091-4/+6
* This change adds co-processor condition branching and conditional traps to th...Chris Dewhurst2016-03-091-0/+47
* The patch adds missing registers and instructions to complete all the registe...Chris Dewhurst2016-02-271-0/+72
* Reverting breaking change. Sorry.Chris Dewhurst2016-02-261-72/+0
* Reviewed at reviews.llvm.org/D17133Chris Dewhurst2016-02-261-0/+72
* Remove autoconf supportChris Bieneman2016-01-261-16/+0
* Reflect the MC/MCDisassembler split on the include/ level.Benjamin Kramer2016-01-261-1/+1
* [SPARCv9] Add support for the rdpr/wrpr instructions.Joerg Sonnenberger2015-10-041-0/+15
* [Sparc] Implement i64 load/store support for 32-bit sparc.James Y Knight2015-08-101-0/+37
* Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)Alexander Kornienko2015-06-231-1/+1
* Fixed/added namespace ending comments using clang-tidy. NFCAlexander Kornienko2015-06-191-1/+1
* Sparc: Add the "alternate address space" load/store instructions.James Y Knight2015-05-181-0/+11
* Add support for the Sparc implementation-defined "ASR" registers.James Y Knight2015-05-181-0/+19
* Remove 3 includes from MCInstrDesc.h and explicitly include them where neededPete Cooper2015-05-151-0/+1
* MC: Modernize MCOperand API naming. NFC.Jim Grosbach2015-05-131-12/+12
* [Sparc] Really add sparcel architecture support.Douglas Katzman2015-04-291-15/+18
* Pass an ArrayRef to MCDisassembler::getInstruction.Rafael Espindola2014-11-121-11/+7
* Misc style fixes. NFC.Rafael Espindola2014-11-101-35/+22
* Prune dependency to MC from each target disassembler.NAKAMURA Takumi2014-07-241-1/+1
* Update library dependencies.NAKAMURA Takumi2014-07-241-1/+1
* [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final...Craig Topper2014-04-291-6/+6
* [Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-2/+2
* [MC] Require an MCContext when constructing an MCDisassembler.Lang Hames2014-04-151-8/+5
* LLVMBuild.txt: Reformat.NAKAMURA Takumi2014-04-101-1/+1
* [Sparc] Add support for decoding 'swap' instruction.Venkatraman Govindaraju2014-03-091-0/+36
* Cleaning up two more pre-Visual C++ 2012 build hacks.Yaron Keren2014-03-061-9/+0
* [Sparc] Add return/rett instruction to Sparc backend.Venkatraman Govindaraju2014-03-021-0/+30
* [Sparc] Add support for decoding jmpl/retl/ret instruction.Venkatraman Govindaraju2014-03-021-0/+36
* [Sparc] Add support for parsing fcmp with %fcc registers.Venkatraman Govindaraju2014-03-021-0/+13
* [Sparc] Add support to decode negative simm13 operands in the sparc disassemb...Venkatraman Govindaraju2014-03-011-0/+9
* [Sparc] Add support for decoding call instructions in the sparc disassembler.Venkatraman Govindaraju2014-03-011-0/+21
* [Sparc] Add support to disassemble sparc memory instructions.Venkatraman Govindaraju2014-03-011-0/+110
* [Sparc] Replace (unsigned)-1 with ~OU as suggested by Reid Kleckner.Venkatraman Govindaraju2014-01-121-9/+9
* [Sparc] Explicitly cast -1 to unsigned to fix buildbot errors.Venkatraman Govindaraju2014-01-061-8/+8
* [Sparc] Add initial implementation of disassembler for sparcVenkatraman Govindaraju2014-01-064-0/+279
OpenPOWER on IntegriCloud