diff options
author | Douglas Katzman <dougk@google.com> | 2015-04-29 20:30:57 +0000 |
---|---|---|
committer | Douglas Katzman <dougk@google.com> | 2015-04-29 20:30:57 +0000 |
commit | 9160e78ac80763929519a6a5718b30694f23a2d3 (patch) | |
tree | be0a36306f8e7e3555e940ecb471e42d752b5962 /llvm/lib/Target/Sparc/Disassembler | |
parent | 88d1f632cf41fede7e0ea0cb5cf662bffa800ce9 (diff) | |
download | bcm5719-llvm-9160e78ac80763929519a6a5718b30694f23a2d3.tar.gz bcm5719-llvm-9160e78ac80763929519a6a5718b30694f23a2d3.zip |
[Sparc] Really add sparcel architecture support.
Mostly copy-and-paste from Sparc v8 architecture.
Differential Revision: http://reviews.llvm.org/D8741
llvm-svn: 236146
Diffstat (limited to 'llvm/lib/Target/Sparc/Disassembler')
-rw-r--r-- | llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp | 33 |
1 files changed, 18 insertions, 15 deletions
diff --git a/llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp b/llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp index 8bc4ca98161..8a6f3a65001 100644 --- a/llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp +++ b/llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp @@ -16,6 +16,8 @@ #include "SparcSubtarget.h" #include "llvm/MC/MCDisassembler.h" #include "llvm/MC/MCFixedLenDisassembler.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCAsmInfo.h" #include "llvm/Support/TargetRegistry.h" using namespace llvm; @@ -38,17 +40,15 @@ public: raw_ostream &VStream, raw_ostream &CStream) const override; }; - } namespace llvm { - extern Target TheSparcTarget, TheSparcV9Target; +extern Target TheSparcTarget, TheSparcV9Target, TheSparcelTarget; } -static MCDisassembler *createSparcDisassembler( - const Target &T, - const MCSubtargetInfo &STI, - MCContext &Ctx) { +static MCDisassembler *createSparcDisassembler(const Target &T, + const MCSubtargetInfo &STI, + MCContext &Ctx) { return new SparcDisassembler(STI, Ctx); } @@ -59,10 +59,10 @@ extern "C" void LLVMInitializeSparcDisassembler() { createSparcDisassembler); TargetRegistry::RegisterMCDisassembler(TheSparcV9Target, createSparcDisassembler); + TargetRegistry::RegisterMCDisassembler(TheSparcelTarget, + createSparcDisassembler); } - - static const unsigned IntRegDecoderTable[] = { SP::G0, SP::G1, SP::G2, SP::G3, SP::G4, SP::G5, SP::G6, SP::G7, @@ -208,16 +208,19 @@ static DecodeStatus DecodeSWAP(MCInst &Inst, unsigned insn, uint64_t Address, /// Read four bytes from the ArrayRef and return 32 bit word. static DecodeStatus readInstruction32(ArrayRef<uint8_t> Bytes, uint64_t Address, - uint64_t &Size, uint32_t &Insn) { + uint64_t &Size, uint32_t &Insn, + bool IsLittleEndian) { // We want to read exactly 4 Bytes of data. if (Bytes.size() < 4) { Size = 0; return MCDisassembler::Fail; } - // Encoded as a big-endian 32-bit word in the stream. - Insn = - (Bytes[3] << 0) | (Bytes[2] << 8) | (Bytes[1] << 16) | (Bytes[0] << 24); + Insn = IsLittleEndian + ? (Bytes[0] << 0) | (Bytes[1] << 8) | (Bytes[2] << 16) | + (Bytes[3] << 24) + : (Bytes[3] << 0) | (Bytes[2] << 8) | (Bytes[1] << 16) | + (Bytes[0] << 24); return MCDisassembler::Success; } @@ -228,12 +231,12 @@ DecodeStatus SparcDisassembler::getInstruction(MCInst &Instr, uint64_t &Size, raw_ostream &VStream, raw_ostream &CStream) const { uint32_t Insn; - - DecodeStatus Result = readInstruction32(Bytes, Address, Size, Insn); + bool isLittleEndian = getContext().getAsmInfo()->isLittleEndian(); + DecodeStatus Result = + readInstruction32(Bytes, Address, Size, Insn, isLittleEndian); if (Result == MCDisassembler::Fail) return MCDisassembler::Fail; - // Calling the auto-generated decoder function. Result = decodeInstruction(DecoderTableSparc32, Instr, Insn, Address, this, STI); |