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path: root/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
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* [RISCV] Support ABI checking with per function target-featuresZakk Chen2020-01-271-0/+13
* Revert "[RISCV] Support ABI checking with per function target-features"Zakk Chen2020-01-271-12/+0
* [RISCV] Support ABI checking with per function target-featuresZakk Chen2020-01-151-0/+12
* Revert "[RISCV] Support ABI checking with per function target-features"Zakk Chen2020-01-151-12/+0
* [RISCV] Support ABI checking with per function target-featuresZakk Chen2020-01-151-0/+12
* CMake: Make most target symbols hidden by defaultTom Stellard2020-01-141-1/+1
* [RISCV] Collect Statistics on Compressed InstructionsSam Elliott2020-01-131-0/+8
* [RISCV] Check register class for AMO memory operandsJames Clarke2020-01-131-0/+5
* [RISCV] Move DebugLoc Copy into CompressInstEmitterSam Elliott2019-12-131-1/+0
* [RISCV] Improve assembler missing feature warningsSimon Cook2019-12-101-3/+17
* [RISCV] Add assembly mnemonic spell checkingSimon Cook2019-11-181-2/+11
* [RISCV] Rename FPRs and use Register arithmeticLuis Marques2019-09-271-48/+16
* [RISCV] Fix static analysis issuesLuis Marques2019-09-201-2/+2
* [RISCV] Unbreak the buildBenjamin Kramer2019-09-171-4/+4
* [RISCV][NFC] Use NoRegister instead of 0 literalLuis Marques2019-09-171-4/+4
* Do a sweep of symbol internalization. NFC.Benjamin Kramer2019-08-231-1/+1
* [RISCV] Add support for RVC HINT instructionsLuis Marques2019-08-211-0/+4
* [RISCV] Convert registers from unsigned to RegisterLuis Marques2019-08-161-32/+33
* [RISCV] Allow parsing of bare symbols with offsetsLewis Revill2019-08-161-0/+18
* [llvm] Migrate llvm::make_unique to std::make_uniqueJonas Devlieghere2019-08-151-4/+4
* [RISCV] Add Custom Parser for Atomic Memory OperandsSam Elliott2019-08-011-0/+77
* [RISCV] Fix uninitialized variable after call to evaluateConstantImmFrancis Visoiu Mistrih2019-07-291-22/+22
* [RISCV] Allow parsing dot '.' in assemblySam Elliott2019-07-121-0/+1
* [RISCV] Add break; to the last switch caseFangrui Song2019-07-011-0/+1
* [RISCV] Add pseudo instruction for calls with explicit registerLewis Revill2019-06-261-0/+4
* [RISCV] Allow parsing immediates that use tilde & exclaimLewis Revill2019-06-191-0/+4
* [RISCV] Fix failure to parse parenthesized immediatesLewis Revill2019-06-191-3/+8
* Revert CMake: Make most target symbols hidden by defaultTom Stellard2019-06-111-1/+1
* CMake: Make most target symbols hidden by defaultTom Stellard2019-06-101-1/+1
* [RISCV] Support assembling TLS LA pseudo instructionsLewis Revill2019-05-231-0/+43
* [RISCV] Create a TargetInfo header. NFCRichard Trieu2019-05-151-0/+1
* [RISCV] Support assembling %tls_{ie,gd}_pcrel_hi modifiersLewis Revill2019-04-231-4/+9
* [RISCV] Diagnose invalid second input register operand when using %tprel_addRoger Ferrer Ibanez2019-04-111-2/+26
* [RISCV] Support assembling TLS add and associated modifiersLewis Revill2019-04-041-7/+25
* [RISCV] Support assembling @plt symbol operandsAlex Bradbury2019-04-021-2/+12
* [RISCV] Attach VK_RISCV_CALL to symbols upon creationAlex Bradbury2019-04-011-0/+34
* [RISCV] Add basic RV32E definitions and MC layer supportAlex Bradbury2019-03-221-4/+9
* [RISCV][NFC] Factor out matchRegisterNameHelper in RISCVAsmParser.cppAlex Bradbury2019-03-171-11/+17
* [RISCV] Fix RISCVAsmParser::ParseRegister and add testsAlex Bradbury2019-03-171-5/+7
* [RISCV] Implement pseudo instructions for load/store from a symbol address.Kito Cheng2019-02-201-1/+80
* [RISCV] Add assembler support for LA pseudo-instructionAlex Bradbury2019-02-151-17/+71
* [RISCV] Support assembling %got_pcrel_hi operatorAlex Bradbury2019-02-151-4/+6
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [RISCV][MC] Add support for evaluating constant symbols as immediatesAlex Bradbury2019-01-101-8/+1
* [RISCV][MC] Accept %lo and %pcrel_lo on operands to liAlex Bradbury2019-01-031-3/+15
* [RISCV] Support .option push and .option popAlex Bradbury2018-11-281-1/+46
* [RISCV] Introduce the RISCVMatInt::generateInstSeq helperAlex Bradbury2018-11-151-72/+16
* [RISCV] Support .option relax and .option norelaxAlex Bradbury2018-11-121-1/+42
* [RISCV] Support named operands for CSR instructions.Ana Pazos2018-10-041-54/+157
* [RISCV][MC] Modify evaluateConstantImm interface to allow reuse from addExprAlex Bradbury2018-09-201-35/+34
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