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path: root/llvm/lib/Target/R600/AMDGPURegisterInfo.cpp
Commit message (Expand)AuthorAgeFilesLines
* R600 -> AMDGPU renameTom Stellard2015-06-131-63/+0
* Remove the need to cache the subtarget in the R600 TargetRegisterInfoEric Christopher2015-03-111-4/+1
* R600/SI: Enable inline assemblyTom Stellard2014-12-031-2/+1
* R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtargetTom Stellard2014-06-131-2/+2
* Use range forMatt Arsenault2014-05-151-1/+1
* Make consistent use of MCPhysReg instead of uint16_t throughout the tree.Craig Topper2014-04-041-3/+3
* Use llvm_unreachable instead of assert(0)Matt Arsenault2013-12-101-1/+1
* R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2Tom Stellard2013-08-141-19/+13
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-071-4/+2
* R600: Consolidate sub register indices.Tom Stellard2013-02-071-16/+16
* R600: Support for indirect addressing v4Tom Stellard2013-02-061-0/+23
* Update AMDGPURegisterInfo::eliminateFrameIndex() corresponding to r174083.NAKAMURA Takumi2013-01-311-0/+1
* Add R600 backendTom Stellard2012-12-111-0/+51
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