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path: root/llvm/lib/Target/R600/AMDGPUInstrInfo.cpp
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* R600 -> AMDGPU renameTom Stellard2015-06-131-369/+0
* [CodeGen] ArrayRef'ize cond/pred in various TII APIs. NFC.Ahmed Bougacha2015-06-111-4/+3
* [InstrInfo] Refactor foldOperandImpl to thread through InsertPt. NFCKeno Fischer2015-06-081-8/+6
* Remove the need to cache the subtarget in the R600 TargetRegisterInfoEric Christopher2015-03-111-3/+3
* ArrayRefize memory operand folding. NFC.Benjamin Kramer2015-02-281-14/+10
* Make helper functions/classes/globals static. NFC.Benjamin Kramer2015-02-061-1/+1
* Reuse a bunch of cached subtargets and remove getSubtarget callsEric Christopher2015-01-301-4/+1
* R600/SI: Don't shrink instructions whose e32 encoding doesn't existMarek Olsak2015-01-151-1/+32
* R600/SI: Add VI instructionsMarek Olsak2014-12-071-1/+1
* R600: Remove dead codeMatt Arsenault2014-10-071-16/+1
* R600: Increase nearby load scheduling threshold.Matt Arsenault2014-08-061-9/+20
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-1/+4
* Remove line with no effectMatt Arsenault2014-07-291-1/+0
* R600: Implement enableClusterLoads()Matt Arsenault2014-07-241-0/+4
* R600: Remove AMDIL instruction and register definitionsTom Stellard2014-06-131-22/+0
* R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtargetTom Stellard2014-06-131-2/+2
* R600: Drop use of cached TargetMachine in AMDGPUInstrInfo.cppTom Stellard2014-06-131-1/+1
* R600/SI: Refactor the VOP3_32 tablegen classTom Stellard2014-05-161-0/+11
* [C++] Use 'nullptr'. Target edition.Craig Topper2014-04-251-3/+3
* [cleanup] Lift using directives, DEBUG_TYPE definitions, and even someChandler Carruth2014-04-221-3/+2
* Fix indentationMatt Arsenault2014-03-111-9/+8
* Use llvm_unreachable instead of assert(0)Matt Arsenault2013-12-101-2/+2
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-191-1/+5
* Revert r194865 and r194874.Alexey Samsonov2013-11-181-5/+1
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-151-1/+5
* R600/SI: Add support for private address space load/storeTom Stellard2013-11-131-12/+75
* Removing a switch statement that contains only a default label. This resolve...Aaron Ballman2013-10-291-28/+25
* R600: Simplify handling of private address spaceTom Stellard2013-10-221-0/+40
* R600/SI: Define a separate MIMG instruction for each possible output value typeTom Stellard2013-10-101-0/+9
* R600: Enable -verify-machineinstrs in some tests.Vincent Lejeune2013-10-011-1/+1
* R600: Use new getNamedOperandIdx function generated by TableGenTom Stellard2013-06-251-0/+1
* R600: Rework subtarget info and remove AMDILDevice classesTom Stellard2013-06-071-1/+0
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-071-1/+1
* R600: Hide symbols of implementation details.Benjamin Kramer2013-05-231-21/+0
* R600/SI: add VOP mapping functionsChristian Konig2013-02-261-0/+1
* R600: Support for indirect addressing v4Tom Stellard2013-02-061-1/+10
* Add R600 backendTom Stellard2012-12-111-0/+257
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