| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [PowerPC] Implement missing ISA 2.06 instructions. | Tony Jiang | 2017-01-05 | 1 | -0/+6 |
| * | [PPC] Generate positive FP zero using xor insn instead of loading from consta... | Ehsan Amiri | 2016-10-24 | 1 | -0/+7 |
| * | [Power9] Part-word VSX integer scalar loads/stores and sign extend instructions | Nemanja Ivanovic | 2016-10-04 | 1 | -0/+10 |
| * | [Power9] Exploit move and splat instructions for build_vector improvement | Nemanja Ivanovic | 2016-09-23 | 1 | -0/+7 |
| * | [PowerPC] Support asm parsing for bc[l][a][+-] mnemonics | Hal Finkel | 2016-09-03 | 1 | -0/+16 |
| * | [PowerPC] Add asm parser/disassembler support for hrfid,nap,slbmfev | Hal Finkel | 2016-09-02 | 1 | -0/+19 |
| * | This reverts commit r265505. | Kit Barton | 2016-04-28 | 1 | -73/+0 |
| * | [PowerPC] Basic support for P9 byte comparison and count trailing zero insns | Nemanja Ivanovic | 2016-04-13 | 1 | -0/+37 |
| * | [Power9] Implement add-pc, multiply-add, modulo, extend-sign-shift, random nu... | Chuang-Yu Cheng | 2016-04-06 | 1 | -0/+74 |
| * | [Power9] Implement copy-paste, msgsync, slb, and stop instructions | Chuang-Yu Cheng | 2016-04-06 | 1 | -0/+11 |
| * | [PowerPC] Basic support for P9 atomic loads and stores | Nemanja Ivanovic | 2016-03-31 | 1 | -0/+14 |
| * | [Power9] Implement new altivec instructions: bcd* series | Chuang-Yu Cheng | 2016-03-28 | 1 | -0/+38 |
| * | [Power9] Implement new vsx instructions: insert, extract, test data class, mi... | Chuang-Yu Cheng | 2016-03-28 | 1 | -0/+104 |
| * | [Power9] Implement new altivec instructions: permute, count zero, extend sign... | Chuang-Yu Cheng | 2016-03-26 | 1 | -0/+15 |
| * | [Power9] Implement new vsx instructions: load, store instructions for vector ... | Kit Barton | 2016-03-08 | 1 | -0/+15 |
| * | Power9] Implement new vsx instructions: compare and conversion | Kit Barton | 2016-02-26 | 1 | -0/+23 |
| * | [PPC64] Add support for clrbhrb, mfbhrbe, rfebb. | Bill Schmidt | 2015-05-22 | 1 | -0/+26 |
| * | [PowerPC] Add asm/disasm support for dcbt with hint | Hal Finkel | 2015-04-23 | 1 | -0/+15 |
| * | Add direct moves to/from VSR and exploit them for FP/INT conversions | Nemanja Ivanovic | 2015-04-11 | 1 | -0/+6 |
| * | Add Hardware Transactional Memory (HTM) Support | Kit Barton | 2015-03-25 | 1 | -0/+54 |
| * | Add LLVM support for PPC cryptography builtins | Nemanja Ivanovic | 2015-03-04 | 1 | -0/+33 |
| * | [PowerPC] Add support for the QPX vector instruction set | Hal Finkel | 2015-02-25 | 1 | -0/+92 |
| * | [PowerPC] Add assembler support for mcrfs and friends | Hal Finkel | 2015-01-15 | 1 | -0/+38 |
| * | [PowerPC] Ensure that the TOC reload directly follows bctrl on PPC64 | Hal Finkel | 2014-12-23 | 1 | -0/+39 |
| * | [PowerPC] Add the 'attn' instruction | Hal Finkel | 2014-11-25 | 1 | -0/+6 |
| * | [PowerPC] Add support for dcbtst and icbt (prefetch) | Hal Finkel | 2014-08-23 | 1 | -0/+15 |
| * | tlbre / tlbwe / tlbsx / tlbsx. variants for the PPC 4xx CPUs. | Joerg Sonnenberger | 2014-08-04 | 1 | -0/+16 |
| * | Don't use additional arguments for dss and friends to satisfy DSS_Form, | Joerg Sonnenberger | 2014-08-02 | 1 | -2/+1 |
| * | Refactor TLBIVAX and add tlbsx. | Joerg Sonnenberger | 2014-07-30 | 1 | -0/+5 |
| * | Recognize BookE's mbar instruction. | Joerg Sonnenberger | 2014-07-29 | 1 | -0/+9 |
| * | Support move to/from segment register. | Joerg Sonnenberger | 2014-07-29 | 1 | -0/+22 |
| * | [PowerPC] Simplify and improve loading into TOC register | Ulrich Weigand | 2014-06-18 | 1 | -14/+0 |
| * | [PowerPC] Initial support for the VSX instruction set | Hal Finkel | 2014-03-13 | 1 | -0/+167 |
| * | Add CR-bit tracking to the PowerPC backend for i1 values | Hal Finkel | 2014-02-28 | 1 | -0/+19 |
| * | Add a disassembler to the PowerPC backend | Hal Finkel | 2013-12-19 | 1 | -0/+4 |
| * | Improve instruction scheduling for the PPC POWER7 | Hal Finkel | 2013-12-12 | 1 | -0/+9 |
| * | Add IIC_ prefix to PPC instruction-class names | Hal Finkel | 2013-11-27 | 1 | -3/+3 |
| * | Implement asm support for a few PowerPC bookIII that are needed for assembling | Roman Divacky | 2013-09-12 | 1 | -0/+33 |
| * | [PowerPC] Support "eieio" instruction | Ulrich Weigand | 2013-07-01 | 1 | -0/+6 |
| * | [PowerPC] Add variants of "sync" instruction | Ulrich Weigand | 2013-07-01 | 1 | -1/+4 |
| * | [PowerPC] Support generic conditional branches in asm parser | Ulrich Weigand | 2013-06-24 | 1 | -0/+14 |
| * | Implement the PowerPC system call (sc) instruction. | Bill Schmidt | 2013-05-14 | 1 | -0/+13 |
| * | [PowerPC] Add some Book II instructions to AsmParser | Ulrich Weigand | 2013-05-03 | 1 | -0/+6 |
| * | PowerPC: Fix encoding of rldimi and rldcl instructions | Ulrich Weigand | 2013-04-26 | 1 | -0/+19 |
| * | Add a comment about the PPC Interpretation64Bit bit | Hal Finkel | 2013-04-12 | 1 | -0/+5 |
| * | Add PPC instruction record forms and associated query functions | Hal Finkel | 2013-04-12 | 1 | -1/+14 |
| * | Generate PPC early conditional returns | Hal Finkel | 2013-04-08 | 1 | -3/+3 |
| * | PowerPC: Mark patterns as isCodeGenOnly. | Ulrich Weigand | 2013-03-26 | 1 | -0/+1 |
| * | PowerPC: Simplify FADD in round-to-zero mode. | Ulrich Weigand | 2013-03-26 | 1 | -2/+1 |
| * | PowerPC: Use CCBITRC operand for ISEL patterns. | Ulrich Weigand | 2013-03-26 | 1 | -4/+2 |
