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authorTony Jiang <jtony@ca.ibm.com>2017-01-05 15:00:45 +0000
committerTony Jiang <jtony@ca.ibm.com>2017-01-05 15:00:45 +0000
commit3a2f00b024da5d613113a8ae4fc83405f580f12b (patch)
treef6dcaa3ed3f51915b005c519a55b6cb213b7e416 /llvm/lib/Target/PowerPC/PPCInstrFormats.td
parente27b058de355e7af398c999db022ef11cf444b20 (diff)
downloadbcm5719-llvm-3a2f00b024da5d613113a8ae4fc83405f580f12b.tar.gz
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[PowerPC] Implement missing ISA 2.06 instructions.
Instructions: fctidu[.], fctiwu[.], ftdiv, ftsqrt are not implemented. Implement them and add corresponding test cases in this patch. llvm-svn: 291116
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCInstrFormats.td')
-rw-r--r--llvm/lib/Target/PowerPC/PPCInstrFormats.td6
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCInstrFormats.td b/llvm/lib/Target/PowerPC/PPCInstrFormats.td
index 99689f656c2..ef7d2012a23 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrFormats.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrFormats.td
@@ -603,6 +603,12 @@ class XForm_17<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
let Inst{31} = 0;
}
+class XForm_17a<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
+ InstrItinClass itin>
+ : XForm_17<opcode, xo, OOL, IOL, asmstr, itin > {
+ let FRA = 0;
+}
+
// Used for QPX
class XForm_18<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
InstrItinClass itin, list<dag> pattern>
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