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path: root/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
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* [PowerPC] Refactor byval handling in LowerFormalArguments_64SVR4Ulrich Weigand2014-07-201-31/+35
* [PowerPC] Fix FrameIndex handling in SelectAddressRegImmUlrich Weigand2014-07-201-1/+7
* [PowerPC] 32-bit ELF PIC supportHal Finkel2014-07-181-12/+45
* [PowerPC] Implement atomic NAND operations as actual NANDUlrich Weigand2014-07-081-4/+4
* [PowerPC] Fix no-assert buildUlrich Weigand2014-07-071-0/+1
* [PowerPC] Fix "byval align" argumentsUlrich Weigand2014-07-071-67/+62
* [DAG] Pass the argument list to the CallLoweringInfo via move semantics. NFCI.Juergen Ributzka2014-07-011-1/+2
* Add ops() method to SDNode that returns an ArrayRef<SDUse>. Use it to simplif...Craig Topper2014-06-291-8/+6
* [PowerPC] Refactor getMinCallFrameSize / getMinCallArgumentsSizeUlrich Weigand2014-06-231-20/+17
* [PowerPC] Fix IsDarwin arg in PPCFrameLowering:: callsUlrich Weigand2014-06-231-5/+5
* [PowerPC] Refactor setMinReservedArea and CalculateParameterAndLinkageAreaSizeUlrich Weigand2014-06-231-122/+108
* [PowerPC] Fix on-stack AltiVec arguments with 64-bit SVR4Ulrich Weigand2014-06-231-44/+29
* [PowerPC] Fix small argument stack slot offset for LEUlrich Weigand2014-06-201-11/+20
* [PowerPC] Remove unnecessary load of r12 in indirect callUlrich Weigand2014-06-181-4/+0
* [PowerPC] Simplify and improve loading into TOC registerUlrich Weigand2014-06-181-4/+11
* [PowerPC] Do not use BLA with the 64-bit SVR4 ABIUlrich Weigand2014-06-181-7/+7
* Remove an extraneous this-> to access the subtarget.Eric Christopher2014-06-121-1/+1
* Rename PPCSubTarget to Subtarget in PPCTargetLowering for consistency.Eric Christopher2014-06-121-125/+123
* [PPC64LE] Recognize shufflevector patterns for little endianBill Schmidt2014-06-101-55/+104
* [PPC64LE] Generate correct code for unaligned little-endian vector loadsBill Schmidt2014-06-091-21/+39
* [PPC64LE] Generate correct little-endian code for v16i8 multiplyBill Schmidt2014-06-091-4/+16
* [PPC64LE] Fix lowering of BUILD_VECTOR and SHUFFLE_VECTOR for little endianBill Schmidt2014-06-061-3/+34
* Omit else branch after return.Eric Christopher2014-06-021-2/+4
* Have the TLOF creation take a Triple rather than needing a subtarget.Eric Christopher2014-05-311-3/+5
* isSVR4ABI() returned !isDarwin() so just move that to the elseEric Christopher2014-05-301-4/+1
* Rename CreateTLOF->createTLOF to match the rest of the file and theEric Christopher2014-05-301-4/+4
* [PATCH] Correct type used for VADD_SPLAT optimization on PowerPCBill Schmidt2014-05-271-4/+8
* [PowerPC] PR19796: Also match ISD::TargetConstant in isIntS16ImmediateAdam Nemet2014-05-201-1/+1
* SDAG: Legalize vector BSWAP into a shuffle if the shuffle is legal but the bs...Benjamin Kramer2014-05-191-0/+1
* Target: remove old constructors for CallLoweringInfoSaleem Abdulrasool2014-05-171-10/+5
* Rename ComputeMaskedBits to computeKnownBits. "Masked" has beenJay Foad2014-05-141-12/+12
* [PowerPC] Add global named register supportHal Finkel2014-05-111-0/+25
* Use makeArrayRef insted of calling ArrayRef<T> constructor directly. I introd...Craig Topper2014-04-301-5/+4
* Convert more SelectionDAG functions to use ArrayRef.Craig Topper2014-04-281-1/+1
* [C++] Use 'nullptr'.Craig Topper2014-04-281-2/+2
* Convert SelectionDAG::getMergeValues to use ArrayRef.Craig Topper2014-04-271-4/+4
* Convert getMemIntrinsicNode to take ArrayRef of SDValue instead of pointer an...Craig Topper2014-04-261-7/+5
* Convert SelectionDAG::getNode methods to use ArrayRef<SDValue>.Craig Topper2014-04-261-35/+24
* [C++] Use 'nullptr'. Target edition.Craig Topper2014-04-251-26/+27
* Add 'musttail' marker to call instructionsReid Kleckner2014-04-241-0/+4
* Break PseudoSourceValue out of the Value hierarchy. It is now the root of its...Nick Lewycky2014-04-151-2/+2
* [PowerPC] Implement some additional TLI callbacksHal Finkel2014-04-121-0/+36
* [PowerPC] Don't return false from PPC::isVSLDOIShuffleMaskHal Finkel2014-04-081-1/+1
* Make consistent use of MCPhysReg instead of uint16_t throughout the tree.Craig Topper2014-04-041-24/+24
* [PowerPC] Don't ever expand BUILD_VECTOR of v2i64 with shufflesHal Finkel2014-03-311-0/+9
* [PowerPC] Handle VSX v2i64 SIGN_EXTEND_INREGHal Finkel2014-03-301-0/+32
* [PowerPC] Handle v2i64 comparisonsHal Finkel2014-03-291-0/+23
* [PowerPC] Add subregister classes for f64 VSX valuesHal Finkel2014-03-291-4/+11
* [PowerPC] v2[fi]64 need to be explicitly passed in VSX registersHal Finkel2014-03-281-4/+28
* [PowerPC] Fix v2f64 vector extract and related patternsHal Finkel2014-03-271-0/+1
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