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authorHal Finkel <hfinkel@anl.gov>2014-03-27 22:22:48 +0000
committerHal Finkel <hfinkel@anl.gov>2014-03-27 22:22:48 +0000
commit82569b63666d9605bae5257b6492a9015eb07ac9 (patch)
tree9d68077d662da377691469594b9f569eef1d2a0b /llvm/lib/Target/PowerPC/PPCISelLowering.cpp
parente93efaa0e18bbb68b5d7f79d8018dcaa561e891f (diff)
downloadbcm5719-llvm-82569b63666d9605bae5257b6492a9015eb07ac9.tar.gz
bcm5719-llvm-82569b63666d9605bae5257b6492a9015eb07ac9.zip
[PowerPC] Fix v2f64 vector extract and related patterns
First, v2f64 vector extract had not been declared legal (and so the existing patterns were not being used). Second, the patterns for that, and for scalar_to_vector, should really be a regclass copy, not a subregister operation, because the VSX registers directly hold both the vector and scalar data. llvm-svn: 204971
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCISelLowering.cpp')
-rw-r--r--llvm/lib/Target/PowerPC/PPCISelLowering.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 16ff0eb7d72..1c19160c9c6 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -535,6 +535,7 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM)
if (Subtarget->hasVSX()) {
setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v2f64, Legal);
+ setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2f64, Legal);
setOperationAction(ISD::FFLOOR, MVT::v2f64, Legal);
setOperationAction(ISD::FCEIL, MVT::v2f64, Legal);
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