summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp
Commit message (Collapse)AuthorAgeFilesLines
* Remove support for 64b PPC, it's been broken for a long time. It'll beNate Begeman2005-08-131-1632/+0
| | | | | | back once a DAG->DAG ISel exists. llvm-svn: 22778
* Update the targets to the new SETCC/CondCodeSDNode interfaces.Chris Lattner2005-08-091-66/+63
| | | | llvm-svn: 22729
* Update to use the new MathExtras.h support for log2 computation.Chris Lattner2005-08-021-21/+10
| | | | | | Patch contributed by Jim Laskey! llvm-svn: 22594
* Support building non-PICNate Begeman2005-07-211-5/+5
| | | | | | | | Remove the LoadHiAddr pseudo-instruction. Optimization of stores to and loads from statics. Force JIT to use new non-PIC codepaths. llvm-svn: 22494
* Change *EXTLOAD to use an VTSDNode operand instead of being an MVTSDNode.Chris Lattner2005-07-101-2/+2
| | | | | | | | | | | | This is the last MVTSDNode. This allows us to eliminate a bunch of special case code for handling MVTSDNodes. Also, remove some uses of dyn_cast that should really be cast (which is cheaper in a release build). llvm-svn: 22368
* Change TRUNCSTORE to use a VTSDNode operand instead of being an MVTSTDNodeChris Lattner2005-07-101-1/+1
| | | | llvm-svn: 22366
* If we support structs as va_list, we must pass pointers to them to va_copyAndrew Lenharth2005-06-221-14/+0
| | | | | | See last commit for LangRef, this implements it on all targets. llvm-svn: 22273
* core changes for varargsAndrew Lenharth2005-06-181-13/+27
| | | | llvm-svn: 22254
* Fix andrews changes to fit in 80 columnsChris Lattner2005-05-151-6/+12
| | | | llvm-svn: 22064
* treat TAILCALL nodes identically to CALL nodesChris Lattner2005-05-131-0/+3
| | | | llvm-svn: 21977
* Add an isTailCall flag to LowerCallToChris Lattner2005-05-131-2/+3
| | | | llvm-svn: 21958
* Realize that we don't support fmod directly, fixing ↵Chris Lattner2005-05-131-1/+3
| | | | | | CodeGen/Generic/print-arith-fp.ll llvm-svn: 21939
* rename the ADJCALLSTACKDOWN/ADJCALLSTACKUP nodes to be CALLSEQ_START/BEGIN.Chris Lattner2005-05-121-6/+6
| | | | llvm-svn: 21915
* Pass in Calling Convention to use into LowerCallToChris Lattner2005-05-121-1/+2
| | | | llvm-svn: 21899
* These targets don't like setccChris Lattner2005-05-121-0/+3
| | | | llvm-svn: 21884
* fix typoAndrew Lenharth2005-05-041-1/+1
| | | | llvm-svn: 21693
* Implement count leading zeros (ctlz), count trailing zeros (cttz), and countAndrew Lenharth2005-05-031-0/+5
| | | | | | | | | population (ctpop). Generic lowering is implemented, however only promotion is implemented for SelectionDAG at the moment. More coming soon. llvm-svn: 21676
* Doesn't support these nodesChris Lattner2005-04-301-0/+8
| | | | llvm-svn: 21634
* Implement Value* tracking for loads and stores in the selection DAG. This ↵Andrew Lenharth2005-04-271-7/+7
| | | | | | | | enables one to use alias analysis in the backends. (TRUNK)Stores and (EXT|ZEXT|SEXT)Loads have an extra SDOperand which is a SrcValueSDNode which contains the Value*. Note that if the operation is introduced by the backend, it will still have the operand, but the value* will be null. llvm-svn: 21599
* Convert tabs to spacesMisha Brukman2005-04-221-3/+4
| | | | llvm-svn: 21452
* Remove trailing whitespaceMisha Brukman2005-04-211-95/+95
| | | | llvm-svn: 21425
* Elimate handling of ZERO_EXTEND_INREG. This causes the PPC backend to emitChris Lattner2005-04-131-12/+0
| | | | | | | andi instructions instead of rlwinm instructions for zero extend, but they seem like they would take the same time. llvm-svn: 21268
* This target does not yet support ISD::BRCONDTWOWAYChris Lattner2005-04-091-0/+1
| | | | llvm-svn: 21163
* 64b: Expand S/UREMNate Begeman2005-04-091-0/+4
| | | | | | | | | 32b: No longer pattern match fneg(fsub(fmul)) as fnmsub Pattern match fsub a, mul(b, c) as fnmsub Pattern match fadd a, mul(b, c) as fmadd Those changes speed up hydro2d by 2.5%, distray by 6%, and scimark by 8% llvm-svn: 21161
* Fix 64b shiftsNate Begeman2005-04-081-26/+13
| | | | llvm-svn: 21159
* Match Mac OS X 64 bit calling conventionsNate Begeman2005-04-081-116/+46
| | | | llvm-svn: 21157
* Add support for MULHS and MULHU nodesNate Begeman2005-04-061-1/+0
| | | | | | | | Have LegalizeDAG handle SREM and UREM for us Codegen SDIV and UDIV by constant as a multiply by magic constant instead of integer divide, which is very slow. llvm-svn: 21104
* Fix cut & paste errors (32->64), and codegen float->int more optimally.Nate Begeman2005-04-051-68/+8
| | | | llvm-svn: 21098
* Remove 64 bit simple ISel, it never worked correctlyNate Begeman2005-04-051-0/+1767
Add initial (buggy) implementation of 64 bit pattern ISel llvm-svn: 21096
OpenPOWER on IntegriCloud