diff options
| author | Chris Lattner <sabre@nondot.org> | 2005-05-15 19:54:37 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-05-15 19:54:37 +0000 |
| commit | 0ae9b089168bc12afef76c7dd3c0eefa8abe4fdd (patch) | |
| tree | dff171648a1c255b9b7d7e532e16edb581fa41c4 /llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp | |
| parent | efa20fab2d056f532e87ebe7928539dc2b38b0e1 (diff) | |
| download | bcm5719-llvm-0ae9b089168bc12afef76c7dd3c0eefa8abe4fdd.tar.gz bcm5719-llvm-0ae9b089168bc12afef76c7dd3c0eefa8abe4fdd.zip | |
Fix andrews changes to fit in 80 columns
llvm-svn: 22064
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp | 18 |
1 files changed, 12 insertions, 6 deletions
diff --git a/llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp b/llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp index 41138cf7ef0..1d528a9a5b9 100644 --- a/llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp +++ b/llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp @@ -195,7 +195,8 @@ PPC64TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) { SDOperand FIN = DAG.getFrameIndex(FI, MVT::i64); FIN = DAG.getNode(ISD::ADD, MVT::i64, FIN, DAG.getConstant(SubregOffset, MVT::i64)); - argt = newroot = DAG.getLoad(ObjectVT, DAG.getEntryNode(), FIN, DAG.getSrcValue(NULL)); + argt = newroot = DAG.getLoad(ObjectVT, DAG.getEntryNode(), FIN, + DAG.getSrcValue(NULL)); } // Every 4 bytes of argument space consumes one of the GPRs available for @@ -305,7 +306,8 @@ PPC64TargetLowering::LowerCallTo(SDOperand Chain, --GPR_remaining; } else { MemOps.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain, - Args[i].first, PtrOff, DAG.getSrcValue(NULL))); + Args[i].first, PtrOff, + DAG.getSrcValue(NULL))); } ArgOffset += 8; break; @@ -316,11 +318,13 @@ PPC64TargetLowering::LowerCallTo(SDOperand Chain, --FPR_remaining; if (isVarArg) { SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, Chain, - Args[i].first, PtrOff, DAG.getSrcValue(NULL)); + Args[i].first, PtrOff, + DAG.getSrcValue(NULL)); MemOps.push_back(Store); // Float varargs are always shadowed in available integer registers if (GPR_remaining > 0) { - SDOperand Load = DAG.getLoad(MVT::i64, Store, PtrOff, DAG.getSrcValue(NULL)); + SDOperand Load = DAG.getLoad(MVT::i64, Store, PtrOff, + DAG.getSrcValue(NULL)); MemOps.push_back(Load); args_to_use.push_back(Load); --GPR_remaining; @@ -335,7 +339,8 @@ PPC64TargetLowering::LowerCallTo(SDOperand Chain, } } else { MemOps.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain, - Args[i].first, PtrOff, DAG.getSrcValue(NULL))); + Args[i].first, PtrOff, + DAG.getSrcValue(NULL))); } ArgOffset += 8; break; @@ -371,7 +376,8 @@ LowerVAArgNext(bool isVANext, SDOperand Chain, SDOperand VAList, MVT::ValueType ArgVT = getValueType(ArgTy); SDOperand Result; if (!isVANext) { - Result = DAG.getLoad(ArgVT, DAG.getEntryNode(), VAList, DAG.getSrcValue(NULL)); + Result = DAG.getLoad(ArgVT, DAG.getEntryNode(), VAList, + DAG.getSrcValue(NULL)); } else { Result = DAG.getNode(ISD::ADD, VAList.getValueType(), VAList, DAG.getConstant(8, VAList.getValueType())); |
