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| author | Andrew Lenharth <andrewl@lenharth.org> | 2005-05-03 17:19:30 +0000 |
|---|---|---|
| committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-05-03 17:19:30 +0000 |
| commit | 5e177826fd3361216755107400e43fc53dd35e94 (patch) | |
| tree | bb0d2a683d6c1876be30e99b4c8a743d608106e1 /llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp | |
| parent | f436286cf66e81f79a24f49ed89af867c43e898b (diff) | |
| download | bcm5719-llvm-5e177826fd3361216755107400e43fc53dd35e94.tar.gz bcm5719-llvm-5e177826fd3361216755107400e43fc53dd35e94.zip | |
Implement count leading zeros (ctlz), count trailing zeros (cttz), and count
population (ctpop). Generic lowering is implemented, however only promotion
is implemented for SelectionDAG at the moment.
More coming soon.
llvm-svn: 21676
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp b/llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp index 8614a24743c..25fbb98acdf 100644 --- a/llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp +++ b/llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp @@ -68,6 +68,11 @@ namespace { setOperationAction(ISD::SREM, MVT::i64, Expand); setOperationAction(ISD::UREM, MVT::i64, Expand); + // PowerPC has these, but they are not implemented + setOperationAction(ISD::CTPOP, MVT::i64, Expand); + setOperationAction(ISD::CTTZ , MVT::i64, Expand); + setOperationAction(ISD::CTTZ , MVT::i64, Expand); + setShiftAmountFlavor(Extend); // shl X, 32 == 0 addLegalFPImmediate(+0.0); // Necessary for FSEL addLegalFPImmediate(-0.0); // |
