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path: root/llvm/lib/Target/Mips/MicroMipsInstrFormats.td
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* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [mips] Support sigrie instructionSimon Atanasyan2018-11-061-0/+11
* [mips] Add licensing information of the microMIPS tablegen files. (NFC)Simon Dardis2018-06-151-0/+13
* [mips] Sink PredicateControl further down the class hierarchy.Simon Dardis2018-05-301-4/+4
* [mips] Move conditional moves out of isCodeGenOnlySimon Dardis2018-05-091-2/+2
* [mips] Add support for Virtualization ASEPetar Jovanovic2018-04-271-0/+36
* [mips] Correct the definitions of some control instructionsSimon Dardis2018-04-261-1/+1
* [mips] Fix the definition of sync, synciSimon Dardis2018-04-251-2/+3
* [mips] Correct the definitions of the unaligned word memory operation instruc...Simon Dardis2018-04-191-2/+2
* [mips] Define certain instructions in microMIPS32r3Stefan Maksimovic2018-02-081-1/+0
* [mips] Include EVA instructions in Std2MicroMips mapping tablesAleksandar Beserminji2018-02-011-1/+1
* [mips][micromips] Fix (dis)assembly of bc1(t|f)Simon Dardis2017-10-161-1/+2
* [mips] Correct c.cond.fmt instruction definition.Simon Dardis2017-01-161-1/+6
* [mips] synci microMIPS instruction definition.Simon Dardis2016-10-241-0/+11
* Revert "[mips] Fix c.<cc>.<fmt> instruction definition."Simon Dardis2016-09-091-17/+0
* [mips] Fix c.<cc>.<fmt> instruction definition.Simon Dardis2016-09-091-0/+17
* [mips][microMIPS] Implement CFC1, CFC2, CTC1 and CTC2 instructionsHrvoje Varga2016-08-041-0/+13
* [mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instruct...Hrvoje Varga2016-06-271-1/+1
* [mips][microMIPS] Implement LH, LHE, LHU and LHUE instructions and add CodeGe...Zlatko Buljan2016-05-181-3/+4
* [mips][microMIPS] Revert commit r267137Hrvoje Varga2016-04-251-0/+1
* [mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructionsHrvoje Varga2016-04-221-1/+0
* [mips][microMIPS] Implement LWM16, SB16, SH16, SW16, SWSP and SWM16 instructionsZlatko Buljan2015-11-121-1/+1
* [mips][microMIPS] Implement LLE and SCE instructionsHrvoje Varga2015-10-151-0/+16
* [mips][microMIPS] Implement LWLE, LWRE, SWLE and SWRE instructionsHrvoje Varga2015-10-151-0/+16
* [mips][microMIPS] Implement PREFX, LHUE, LBE, LBUE, LHE, LWE, SBE, SHE and SW...Zoran Jovanovic2015-09-161-0/+31
* [mips][microMIPS] Implement CACHEE and PREFE instructionsZoran Jovanovic2015-09-091-0/+16
* [mips][microMIPS] Implement movep instructionZoran Jovanovic2015-02-101-0/+14
* [mips][microMIPS] Implement LWGP instructionJozef Kolek2015-01-281-0/+11
* [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction BJozef Kolek2015-01-211-0/+9
* [mips][microMIPS] Implement ADDIUPC instructionJozef Kolek2015-01-211-0/+11
* Reverted revision 226577.Jozef Kolek2015-01-201-9/+0
* [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction BJozef Kolek2015-01-201-0/+9
* [mips][microMIPS] Implement BEQZ16 and BNEZ16 instructionsJozef Kolek2015-01-121-0/+11
* [mips][microMIPS] Implement CACHE, PREF, SSNOP, EHB and PAUSE instructionsJozef Kolek2014-12-231-0/+26
* [mips][microMIPS] Implement LWSP and SWSP instructionsJozef Kolek2014-12-231-0/+11
* [mips][microMIPS] Implement SWM16 and LWM16 instructionsZoran Jovanovic2014-11-271-0/+12
* [mips][microMIPS] Implement BREAK16 and SDBBP16 instructionsJozef Kolek2014-11-271-0/+9
* [mips][microMIPS] Implement LBU16, LHU16, LW16, SB16, SH16 and SW16 instructionsJozef Kolek2014-11-241-0/+12
* [mips][micromips] Implement SWM32 and LWM32 instructionsZoran Jovanovic2014-11-191-0/+13
* [mips][microMIPS] Implement LWXS instruction.Jozef Kolek2014-11-191-0/+15
* [mips][microMIPS] Implement SDBBP and RDHWR instructions.Jozef Kolek2014-11-191-0/+24
* [mips][microMIPS] Implement ANDI16 instructionZoran Jovanovic2014-11-051-0/+13
* Reverted revisions 221351, 221352 and 221353.Zoran Jovanovic2014-11-051-13/+0
* [mips][microMIPS] Implement ANDI16 instructionZoran Jovanovic2014-11-051-0/+13
* [mips][microMIPS] Implement ADDIUR1SP instructionZoran Jovanovic2014-10-231-0/+12
* ps][microMIPS] Implement ADDIUR2 instructionZoran Jovanovic2014-10-231-0/+14
* ps][microMIPS] Implement LI16 instructionZoran Jovanovic2014-10-231-0/+11
* [mips][microMIPS] Implement CodeGen support for SLL16 and SRL16 instructionsZoran Jovanovic2014-10-231-0/+14
* [mips][microMIPS] Implement ADDU16 and SUBU16 instructionsZoran Jovanovic2014-10-211-0/+14
* [mips][microMIPS] Implement AND16, NOT16, OR16 and XOR16 instructionsZoran Jovanovic2014-10-211-0/+12
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