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| author | Simon Dardis <simon.dardis@imgtec.com> | 2017-10-16 14:20:22 +0000 |
|---|---|---|
| committer | Simon Dardis <simon.dardis@imgtec.com> | 2017-10-16 14:20:22 +0000 |
| commit | 0d378a9eed330cbf35fec1eb8f422f8312fc7c3a (patch) | |
| tree | d0b40e740ea3c13222010fdbf197923915ae91c0 /llvm/lib/Target/Mips/MicroMipsInstrFormats.td | |
| parent | 7508fbd581fb0769ef7998dab5de42d7cf4373f0 (diff) | |
| download | bcm5719-llvm-0d378a9eed330cbf35fec1eb8f422f8312fc7c3a.tar.gz bcm5719-llvm-0d378a9eed330cbf35fec1eb8f422f8312fc7c3a.zip | |
[mips][micromips] Fix (dis)assembly of bc1(t|f)
Previously these instructions were marked codegen only and had
an under-specified instruction description that did not record the
fcc register.
Reviewers: atanasyan, abeserminji
Differential Revision: https://reviews.llvm.org/D38847
llvm-svn: 315905
Diffstat (limited to 'llvm/lib/Target/Mips/MicroMipsInstrFormats.td')
| -rw-r--r-- | llvm/lib/Target/Mips/MicroMipsInstrFormats.td | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/Mips/MicroMipsInstrFormats.td b/llvm/lib/Target/Mips/MicroMipsInstrFormats.td index 774976828a0..bc0045dad21 100644 --- a/llvm/lib/Target/Mips/MicroMipsInstrFormats.td +++ b/llvm/lib/Target/Mips/MicroMipsInstrFormats.td @@ -786,13 +786,14 @@ class C_COND_FM_MM<bits <2> fmt, bits<4> c> : CEQS_FM_MM<fmt> { } class BC1F_FM_MM<bits<5> tf> : MMArch { + bits<3> fcc; bits<16> offset; bits<32> Inst; let Inst{31-26} = 0x10; let Inst{25-21} = tf; - let Inst{20-18} = 0x0; // cc + let Inst{20-18} = fcc; // cc let Inst{17-16} = 0x0; let Inst{15-0} = offset; } |
