| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [mips][microMIPS] Implement CACHE, PREF, SSNOP, EHB and PAUSE instructions | Jozef Kolek | 2014-12-23 | 1 | -0/+22 |
| * | [mips][microMIPS] Implement LWSP and SWSP instructions | Jozef Kolek | 2014-12-23 | 1 | -0/+21 |
| * | Fix UBSan bootstrap: replace shift of negative value with multiplication. | Alexey Samsonov | 2014-12-23 | 1 | -1/+1 |
| * | The single check for N64 inside MipsDisassemblerBase's subclasses is actually... | Vladimir Medic | 2014-12-16 | 1 | -4/+4 |
| * | [mips][microMIPS] Implement SWP and LWP instructions | Zoran Jovanovic | 2014-12-16 | 1 | -0/+3 |
| * | Add disassembler tests for mips3 platform. There are no functional changes. | Vladimir Medic | 2014-12-15 | 1 | -1/+2 |
| * | The andi16, addiusp and jraddiusp micromips instructions were missing dedicat... | Vladimir Medic | 2014-12-01 | 1 | -0/+39 |
| * | [mips][microMIPS] Implement SWM16 and LWM16 instructions | Zoran Jovanovic | 2014-11-27 | 1 | -0/+24 |
| * | [mips] Add synci instruction. | Daniel Sanders | 2014-11-27 | 1 | -0/+20 |
| * | [mips][microMIPS] Implement disassembler support for 16-bit instructions LI16... | Jozef Kolek | 2014-11-27 | 1 | -0/+60 |
| * | [mips][microMIPS] Implement disassembler support for 16-bit instructions LBU1... | Jozef Kolek | 2014-11-26 | 1 | -1/+62 |
| * | [mips][microMIPS] Implement 16-bit instructions registers including ZERO inst... | Jozef Kolek | 2014-11-24 | 1 | -0/+12 |
| * | [mips][microMIPS] Implement disassembler support for 16-bit instructions | Jozef Kolek | 2014-11-24 | 1 | -11/+54 |
| * | [mips][micromips] Implement SWM32 and LWM32 instructions | Zoran Jovanovic | 2014-11-19 | 1 | -5/+43 |
| * | Pass an ArrayRef to MCDisassembler::getInstruction. | Rafael Espindola | 2014-11-12 | 1 | -15/+11 |
| * | Misc style fixes. NFC. | Rafael Espindola | 2014-11-10 | 1 | -78/+53 |
| * | [mips][microMIPS] Implement microMIPS 16-bit instructions registers | Zoran Jovanovic | 2014-10-21 | 1 | -0/+12 |
| * | [mips] Fix disassembly of [ls][wd]c[23], cache, and pref ... | Daniel Sanders | 2014-10-01 | 1 | -0/+66 |
| * | Fix left shifts of negative values in MipsDisassembler. | Alexey Samsonov | 2014-09-02 | 1 | -15/+15 |
| * | [mips] Use MFHC1 when it is available (MIPS32r2 and later) for both FP32 and ... | Daniel Sanders | 2014-07-14 | 1 | -17/+0 |
| * | [mips][mips64r6] Add BLTC and BLTUC instructions | Zoran Jovanovic | 2014-06-18 | 1 | -4/+15 |
| * | [mips][mips64r6] ll, sc, lld, and scd are re-encoded on MIPS32r6/MIPS64r6. | Daniel Sanders | 2014-06-16 | 1 | -0/+26 |
| * | [mips] Add cache and pref instructions | Daniel Sanders | 2014-06-13 | 1 | -8/+24 |
| * | [mips][mips64r6] c.cond.fmt, mov[fntz], and mov[fntz].[ds] are not available ... | Daniel Sanders | 2014-06-12 | 1 | -0/+30 |
| * | [mips][mips64r6] Add bgec and bgeuc instructions | Zoran Jovanovic | 2014-06-12 | 1 | -2/+56 |
| * | [mips][mips64r6] Add LDPC instruction | Zoran Jovanovic | 2014-06-09 | 1 | -0/+9 |
| * | [mips][mips64r6] Add b[on]vc | Daniel Sanders | 2014-05-22 | 1 | -10/+243 |
| * | [mips][mips64r6] Add bc[12](eq|ne)z | Daniel Sanders | 2014-05-21 | 1 | -0/+17 |
| * | [mips][mips64r6] Add compact branch instructions | Zoran Jovanovic | 2014-05-16 | 1 | -0/+30 |
| * | [mips][mips64r6] Add addiupc, aluipc, and auipc | Daniel Sanders | 2014-05-15 | 1 | -0/+9 |
| * | [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final... | Craig Topper | 2014-04-29 | 1 | -12/+12 |
| * | [Modules] Make Support/Debug.h modular. This requires it to not change | Chandler Carruth | 2014-04-21 | 1 | -0/+2 |
| * | [MC] Require an MCContext when constructing an MCDisassembler. | Lang Hames | 2014-04-15 | 1 | -18/+21 |
| * | [mips] Rewrite MipsAsmParser and MipsOperand. | Daniel Sanders | 2014-04-01 | 1 | -1/+51 |
| * | Revert: [mips] Rewrite MipsAsmParser and MipsOperand.' due to buildbot errors... | Daniel Sanders | 2014-03-31 | 1 | -51/+1 |
| * | [mips] Rewrite MipsAsmParser and MipsOperand. | Daniel Sanders | 2014-03-31 | 1 | -1/+51 |
| * | Fixed operand of SC microMIPS instruction. | Zoran Jovanovic | 2014-02-28 | 1 | -0/+3 |
| * | [mips][msa] Fix issue with immediate fields of LD/ST instructions | Matheus Almeida | 2013-12-05 | 1 | -1/+31 |
| * | [mips][msa] Fix immediate value of LSA instruction as it was being wrongly en... | Matheus Almeida | 2013-11-18 | 1 | -0/+16 |
| * | Support for microMIPS branch instructions. | Zoran Jovanovic | 2013-11-04 | 1 | -0/+17 |
| * | Support for microMIPS jump instructions | Zoran Jovanovic | 2013-10-29 | 1 | -0/+15 |
| * | [mips][msa] Direct Object Emission support for LD/ST instructions. | Matheus Almeida | 2013-10-21 | 1 | -0/+19 |
| * | [mips][msa] Direct Object Emission support for CTCMSA and CFCMSA. | Matheus Almeida | 2013-10-21 | 1 | -0/+17 |
| * | [mips][msa] Direct Object Emission for 3R instructions. | Jack Carter | 2013-09-26 | 1 | -0/+17 |
| * | [mips][msa] Direct Object Emission support for the MSA instruction set. | Jack Carter | 2013-09-25 | 1 | -0/+51 |
| * | This patch adds support for microMIPS disassembler and disassembler make chec... | Vladimir Medic | 2013-09-06 | 1 | -8/+79 |
| * | [mips] Use ptr_rc to simplify definitions of base+index load/store instructions. | Akira Hatanaka | 2013-08-28 | 1 | -1/+20 |
| * | [mips] Define register class FGRH32 for the high half of the 64-bit floating | Akira Hatanaka | 2013-08-20 | 1 | -0/+17 |
| * | [mips] Rename DSPRegs. | Akira Hatanaka | 2013-08-14 | 1 | -8/+8 |
| * | [mips] Rename HIRegs and LORegs. | Akira Hatanaka | 2013-08-14 | 1 | -18/+18 |
