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| author | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2014-06-09 09:49:51 +0000 |
|---|---|---|
| committer | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2014-06-09 09:49:51 +0000 |
| commit | 2855142ac561a8dbc9854ff7972653c5831b4c82 (patch) | |
| tree | d22b3e788d576819bbaf19493f03ecfec7e4553f /llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp | |
| parent | 2be29929beb4541f202c6a2301920a61fd3a75f5 (diff) | |
| download | bcm5719-llvm-2855142ac561a8dbc9854ff7972653c5831b4c82.tar.gz bcm5719-llvm-2855142ac561a8dbc9854ff7972653c5831b4c82.zip | |
[mips][mips64r6] Add LDPC instruction
Differential Revision: http://reviews.llvm.org/D3822
llvm-svn: 210460
Diffstat (limited to 'llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp index 95670aa4440..b35c18c8f66 100644 --- a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp +++ b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp @@ -285,6 +285,9 @@ static DecodeStatus DecodeExtSize(MCInst &Inst, static DecodeStatus DecodeSimm19Lsl2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder); +static DecodeStatus DecodeSimm18Lsl3(MCInst &Inst, unsigned Insn, + uint64_t Address, const void *Decoder); + /// INSVE_[BHWD] have an implicit operand that the generated decoder doesn't /// handle. template <typename InsnType> @@ -1197,3 +1200,9 @@ static DecodeStatus DecodeSimm19Lsl2(MCInst &Inst, unsigned Insn, Inst.addOperand(MCOperand::CreateImm(SignExtend32<19>(Insn) << 2)); return MCDisassembler::Success; } + +static DecodeStatus DecodeSimm18Lsl3(MCInst &Inst, unsigned Insn, + uint64_t Address, const void *Decoder) { + Inst.addOperand(MCOperand::CreateImm(SignExtend32<18>(Insn) << 3)); + return MCDisassembler::Success; +} |
