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* [Hexagon] Handle returning small structures by valueKrzysztof Parzyszek2016-07-181-1/+7
| | | | | | | This is compliant with the official ABI, but allows experimentation with calling conventions. llvm-svn: 275822
* [SelectionDAG] Get rid of bool parameters in SelectionDAG::getLoad, ↵Justin Lebar2016-07-151-38/+20
| | | | | | | | | | | | | | | | | | | | | | | getStore, and friends. Summary: Instead, we take a single flags arg (a bitset). Also add a default 0 alignment, and change the order of arguments so the alignment comes before the flags. This greatly simplifies many callsites, and fixes a bug in AMDGPUISelLowering, wherein the order of the args to getLoad was inverted. It also greatly simplifies the process of adding another flag to getLoad. Reviewers: chandlerc, tstellarAMD Subscribers: jholewinski, arsenm, jyknight, dsanders, nemanjai, llvm-commits Differential Revision: http://reviews.llvm.org/D22249 llvm-svn: 275592
* CodeGen: Use MachineInstr& in TargetLowering, NFCDuncan P. N. Exon Smith2016-06-301-12/+11
| | | | | | | | | | | | | This is a mechanical change to make TargetLowering API take MachineInstr& (instead of MachineInstr*), since the argument is expected to be a valid MachineInstr. In one case, changed a parameter from MachineInstr* to MachineBasicBlock::iterator, since it was used as an insertion point. As a side effect, this removes a bunch of MachineInstr* to MachineBasicBlock::iterator implicit conversions, a necessary step toward fixing PR26753. llvm-svn: 274287
* Delete unused includes. NFC.Rafael Espindola2016-06-301-1/+0
| | | | llvm-svn: 274225
* Move shouldAssumeDSOLocal to Target.Rafael Espindola2016-06-271-2/+1
| | | | | | Should fix the shared library build. llvm-svn: 273958
* Use isPositionIndependent predicate. NFC.Rafael Espindola2016-06-261-9/+8
| | | | llvm-svn: 273827
* Preserve DebugInfo when replacing values in DAGCombinerNirav Dave2016-06-231-2/+2
| | | | | | | | | | | | | | | | | | | | | Recommiting after correcting over-eager Debug Value transfer fixing PR28270. [DAG] Previously debug values would transfer debuginfo for the selected start node for a replacement which allows for debug to be dropped. Push debug value transfer to occur with node/value replacement in SelectionDAG, remove now extraneous transfers of debug values. This refixes PR9817 which was being incompletely checked in the testsuite. Reviewers: jyknight Subscribers: dblaikie, llvm-commits Differential Revision: http://reviews.llvm.org/D21037 llvm-svn: 273585
* Revert r273456, "Preserve DebugInfo when replacing values in DAGCombiner" as ↵Peter Collingbourne2016-06-231-2/+2
| | | | | | it caused pr28270. llvm-svn: 273518
* Start using shouldAssumeDSOLocal on Hexagon.Rafael Espindola2016-06-221-2/+3
| | | | | | | Include a token test showing that access to private is now the same as to internal. llvm-svn: 273457
* Preserve DebugInfo when replacing values in DAGCombinerNirav Dave2016-06-221-2/+2
| | | | | | | | | | | | | | | | | | | | | Recommiting after fixing over-aggressive assertion [DAG] Previously debug values would transfer debuginfo for the selected start node for a replacement which allows for debug to be dropped. Push debug value transfer to occur with node/value replacement in SelectionDAG, remove now extraneous transfers of debug values. This refixes PR9817 which was being incompletely checked in the testsuite. Reviewers: jyknight Subscribers: dblaikie, llvm-commits Differential Revision: http://reviews.llvm.org/D21037 llvm-svn: 273456
* [Hexagon] Handle expansion of cmpxchgKrzysztof Parzyszek2016-06-221-0/+10
| | | | llvm-svn: 273432
* Revert "Preserve DebugInfo when replacing values in DAGCombiner"Nirav Dave2016-06-151-2/+2
| | | | | | | | | Reverting due to assertion failure in lib/CodeGen/SelectionDAG/InstrEmitter.cpp This reverts commit r272792. llvm-svn: 272799
* Preserve DebugInfo when replacing values in DAGCombinerNirav Dave2016-06-151-2/+2
| | | | | | | | | | | | | | | | | | | [DAG] Previously debug values would transfer debuginfo for the selected start node for a replacement which allows for debug to be dropped. Push debug value transfer to occur with node/value replacement in SelectionDAG, remove now extraneous transfers of debug values. This refixes PR9817 which was being incompletely checked in the testsuite. Reviewers: jyknight Subscribers: dblaikie, llvm-commits Differential Revision: http://reviews.llvm.org/D21037 llvm-svn: 272792
* Pass DebugLoc and SDLoc by const ref.Benjamin Kramer2016-06-121-26/+17
| | | | | | | | This used to be free, copying and moving DebugLocs became expensive after the metadata rewrite. Passing by reference eliminates a ton of track/untrack operations. No functionality change intended. llvm-svn: 272512
* [Hexagon] Recognize "q" and "v" in inline-asm as register constraintsKrzysztof Parzyszek2016-05-181-0/+14
| | | | llvm-svn: 269933
* [CodeGen] Default CTTZ_ZERO_UNDEF/CTLZ_ZERO_UNDEF to Expand in ↵Craig Topper2016-04-281-10/+1
| | | | | | TargetLoweringBase. This is what the majority of the targets want and removes a bunch of code. Set it to Legal explicitly in the few cases where that's the desired behavior. llvm-svn: 267853
* [Hexagon] Set ctlz_zero_undef/cttz_zero_undef to Expand so LegalizeDAG will ↵Craig Topper2016-04-231-4/+8
| | | | | | convert them to ctlz/cttz. Remove the now unneccessary isel patterns. NFC llvm-svn: 267266
* [Hexagon] Expand handling of the small-data/bss sectionKrzysztof Parzyszek2016-04-211-1/+1
| | | | llvm-svn: 267034
* Use MVT instead of EVT to remove a bunch of unnecessary calls to getSimpleVT.Craig Topper2016-04-151-7/+5
| | | | llvm-svn: 266414
* [Hexagon] Improve handling of unaligned vector loads and storesKrzysztof Parzyszek2016-03-281-0/+26
| | | | llvm-svn: 264584
* Tweak some atomics functions in preparation for larger changes; NFC.James Y Knight2016-03-161-1/+0
| | | | | | | | | | | | | | | | - Rename getATOMIC to getSYNC, as llvm will soon be able to emit both '__sync' libcalls and '__atomic' libcalls, and this function is for the '__sync' ones. - getInsertFencesForAtomic() has been replaced with shouldInsertFencesForAtomic(Instruction), so that the decision can be made per-instruction. This functionality will be used soon. - emitLeadingFence/emitTrailingFence are no longer called if shouldInsertFencesForAtomic returns false, and thus don't need to check the condition themselves. llvm-svn: 263665
* [DAG] use !isUndef() ; NFCISanjay Patel2016-03-141-1/+1
| | | | llvm-svn: 263453
* [DAG] use isUndef() ; NFCISanjay Patel2016-03-141-5/+5
| | | | llvm-svn: 263448
* [Hexagon] Fix lowering of calls with the return type of i1Krzysztof Parzyszek2016-03-041-10/+30
| | | | | | | This fixes an assertion in test/CodeGen/Hexagon/ifcvt-edge-weight.ll when run with -debug-only=isel llvm-svn: 262726
* [Hexagon] Implement TLS supportKrzysztof Parzyszek2016-02-181-1/+155
| | | | | | Patch by Anand Kodnani. llvm-svn: 261218
* [Hexagon] Add support for __builtin_prefetchKrzysztof Parzyszek2016-02-181-0/+32
| | | | llvm-svn: 261210
* [Hexagon] Fix the options controlling jump table generationKrzysztof Parzyszek2016-01-131-2/+2
| | | | llvm-svn: 257679
* [Hexagon] Add PIC supportKrzysztof Parzyszek2015-12-181-101/+121
| | | | llvm-svn: 256025
* [Hexagon] Make memcpy lowering thread-safeTobias Edler von Koch2015-12-161-6/+1
| | | | | | | | This removes an unpleasant hack involving a global variable for special lowering of certain memcpy calls. These are now lowered as intended in EmitTargetCodeForMemcpy in the same way that other targets do it. llvm-svn: 255785
* Replace uint16_t with the MCPhysReg typedef in many places. A lot of ↵Craig Topper2015-12-051-12/+12
| | | | | | physical register arrays already use this typedef. llvm-svn: 254843
* [Hexagon] Simplify LowerCONCAT_VECTORS, handle different types betterKrzysztof Parzyszek2015-12-041-58/+55
| | | | llvm-svn: 254724
* [Hexagon] Remove variable unused in NDEBUG buildKrzysztof Parzyszek2015-12-031-3/+2
| | | | llvm-svn: 254623
* [Hexagon] Implement CONCAT_VECTORS for HVX using V6_vcombineKrzysztof Parzyszek2015-12-031-0/+10
| | | | llvm-svn: 254617
* AArch64: use ldxp/stxp pair to implement 128-bit atomic loads.Tim Northover2015-12-021-1/+1
| | | | | | | | The ARM ARM is clear that 128-bit loads are only guaranteed to have been atomic if there has been a corresponding successful stxp. It's less clear for AArch32, so I'm leaving that alone for now. llvm-svn: 254524
* [Hexagon] Lowering of V60/HVX vector typesKrzysztof Parzyszek2015-11-261-40/+373
| | | | llvm-svn: 254168
* [Hexagon] HVX vector register classes and more isel patternsKrzysztof Parzyszek2015-11-261-0/+25
| | | | llvm-svn: 254132
* Replace dyn_cast with isa in places that weren't using the returned value ↵Craig Topper2015-11-181-2/+2
| | | | | | for more than a boolean check. NFC. llvm-svn: 253441
* [WinEH] Update exception pointer registersJoseph Tremoulet2015-11-071-2/+0
| | | | | | | | | | | | | | | | | | | | Summary: The CLR's personality routine passes these in rdx/edx, not rax/eax. Make getExceptionPointerRegister a virtual method parameterized by personality function to allow making this distinction. Similarly make getExceptionSelectorRegister a virtual method parameterized by personality function, for symmetry. Reviewers: pgavlin, majnemer, rnk Subscribers: jyknight, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D14344 llvm-svn: 252383
* [Hexagon] Fix debug information for local objectsKrzysztof Parzyszek2015-10-191-1/+4
| | | | | | | | | | | | - Isolate the check for the existence of a stack frame into hasFP. - Implement getFrameIndexReference for DWARF address computation. - Use getFrameIndexReference for offset computation in eliminateFrameIndex. - Preserve debug information for dynamically allocated stack objects. - Prefer FP to access local objects at -O0. - Add experimental code to skip allocframe when not strictly necessary (disabled by default). llvm-svn: 250718
* Make a bunch of static arrays const.Craig Topper2015-10-181-1/+1
| | | | llvm-svn: 250642
* [CodeGen] Refactor TLI/AtomicExpand interface to make LLSC explicit.Ahmed Bougacha2015-09-111-2/+5
| | | | | | | | | | | | | | | We used to have this magic "hasLoadLinkedStoreConditional()" callback, which really meant two things: - expand cmpxchg (to ll/sc). - expand atomic loads using ll/sc (rather than cmpxchg). Remove it, and, instead, introduce explicit callbacks: - bool shouldExpandAtomicCmpXchgInIR(inst) - AtomicExpansionKind shouldExpandAtomicLoadInIR(inst) Differential Revision: http://reviews.llvm.org/D12557 llvm-svn: 247429
* PseudoSourceValue: Replace global manager with a manager in a machine function.Alex Lorenz2015-08-111-1/+2
| | | | | | | | | | | | | | | | | | | | | | This commit removes the global manager variable which is responsible for storing and allocating pseudo source values and instead it introduces a new manager class named 'PseudoSourceValueManager'. Machine functions now own an instance of the pseudo source value manager class. This commit also modifies the 'get...' methods in the 'MachinePointerInfo' class to construct pseudo source values using the instance of the pseudo source value manager object from the machine function. This commit updates calls to the 'get...' methods from the 'MachinePointerInfo' class in a lot of different files because those calls now need to pass in a reference to a machine function to those methods. This change will make it easier to serialize pseudo source values as it will enable me to transform the mips specific MipsCallEntry PseudoSourceValue subclass into two target independent subclasses. Reviewers: Akira Hatanaka llvm-svn: 244693
* [Hexagon] Add support for atomic RMW operationsKrzysztof Parzyszek2015-07-091-0/+42
| | | | llvm-svn: 241804
* Make isLegalAddressingMode() taking DataLayout as an argumentMehdi Amini2015-07-091-2/+2
| | | | | | | | | | | | | | | | Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: jholewinski, llvm-commits, rafael, yaron.keren Differential Revision: http://reviews.llvm.org/D11040 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241778
* Make TargetLowering::getPointerTy() taking DataLayout as an argumentMehdi Amini2015-07-091-15/+19
| | | | | | | | | | | | | | | | Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: jholewinski, ted, yaron.keren, rafael, llvm-commits Differential Revision: http://reviews.llvm.org/D11028 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241775
* [TargetLowering] StringRefize asm constraint getters.Benjamin Kramer2015-07-051-2/+1
| | | | | | | | There is some functional change here because it changes target code from atoi(3) to StringRef::getAsInteger which has error checking. For valid constraints there should be no difference. llvm-svn: 241411
* Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)Alexander Kornienko2015-06-231-1/+1
| | | | | | Apparently, the style needs to be agreed upon first. llvm-svn: 240390
* Fixed/added namespace ending comments using clang-tidy. NFCAlexander Kornienko2015-06-191-1/+1
| | | | | | | | | | | | | The patch is generated using this command: tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py -fix \ -checks=-*,llvm-namespace-comment -header-filter='llvm/.*|clang/.*' \ llvm/lib/ Thanks to Eugene Kosov for the original patch! llvm-svn: 240137
* Remove DisableTailCalls from TargetOptions and the code in resetTargetOptionsAkira Hatanaka2015-06-091-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | that was resetting it. Remove the uses of DisableTailCalls in subclasses of TargetLowering and use the value of function attribute "disable-tail-calls" instead. Also, unconditionally add pass TailCallElim to the pipeline and check the function attribute at the start of runOnFunction to disable the pass on a per-function basis. This is part of the work to remove TargetMachine::resetTargetOptions, and since DisableTailCalls was the last non-fast-math option that was being reset in that function, we should be able to remove the function entirely after the work to propagate IR-level fast-math flags to DAG nodes is completed. Out-of-tree users should remove the uses of DisableTailCalls and make changes to attach attribute "disable-tail-calls"="true" or "false" to the functions in the IR. rdar://problem/13752163 Differential Revision: http://reviews.llvm.org/D10099 llvm-svn: 239427
* Add address space argument to isLegalAddressingModeMatt Arsenault2015-06-011-1/+2
| | | | | | | | | | This is important because of different addressing modes depending on the address space for GPU targets. This only adds the argument, and does not update any of the uses to provide the correct address space. llvm-svn: 238723
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