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author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2016-07-18 17:30:41 +0000 |
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committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2016-07-18 17:30:41 +0000 |
commit | 5948ea78b9c157aa41168f6ca10381465e072acf (patch) | |
tree | 04bc054f4030b7da5dd3409426360efee2eafbbd /llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | |
parent | 9d5c55e4f6d86eebaed4b5088b13dee16b9a7506 (diff) | |
download | bcm5719-llvm-5948ea78b9c157aa41168f6ca10381465e072acf.tar.gz bcm5719-llvm-5948ea78b9c157aa41168f6ca10381465e072acf.zip |
[Hexagon] Handle returning small structures by value
This is compliant with the official ABI, but allows experimentation with
calling conventions.
llvm-svn: 275822
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp index 2a5d7d49be7..cdd4c2f8617 100644 --- a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp +++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp @@ -447,7 +447,13 @@ static bool RetCC_Hexagon32(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) { if (LocVT == MVT::i32 || LocVT == MVT::f32) { - if (unsigned Reg = State.AllocateReg(Hexagon::R0)) { + // Note that use of registers beyond R1 is not ABI compliant. However there + // are (experimental) IR passes which generate internal functions that + // return structs using these additional registers. + static const uint16_t RegList[] = { Hexagon::R0, Hexagon::R1, + Hexagon::R2, Hexagon::R3, + Hexagon::R4, Hexagon::R5}; + if (unsigned Reg = State.AllocateReg(RegList)) { State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); return false; } |