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author | Justin Lebar <jlebar@google.com> | 2016-07-15 18:27:10 +0000 |
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committer | Justin Lebar <jlebar@google.com> | 2016-07-15 18:27:10 +0000 |
commit | 9c375817ac1766e537a857f33933f5ab7d7d2cdf (patch) | |
tree | 9327d759b73c37be2b04c67cb0c6be3692f6ccf4 /llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | |
parent | 0af80cd6f0b0ae4770f76f9af3442651dd06fcc2 (diff) | |
download | bcm5719-llvm-9c375817ac1766e537a857f33933f5ab7d7d2cdf.tar.gz bcm5719-llvm-9c375817ac1766e537a857f33933f5ab7d7d2cdf.zip |
[SelectionDAG] Get rid of bool parameters in SelectionDAG::getLoad, getStore, and friends.
Summary:
Instead, we take a single flags arg (a bitset).
Also add a default 0 alignment, and change the order of arguments so the
alignment comes before the flags.
This greatly simplifies many callsites, and fixes a bug in
AMDGPUISelLowering, wherein the order of the args to getLoad was
inverted. It also greatly simplifies the process of adding another flag
to getLoad.
Reviewers: chandlerc, tstellarAMD
Subscribers: jholewinski, arsenm, jyknight, dsanders, nemanjai, llvm-commits
Differential Revision: http://reviews.llvm.org/D22249
llvm-svn: 275592
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 58 |
1 files changed, 20 insertions, 38 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp index 6aeca590b21..2a5d7d49be7 100644 --- a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp +++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp @@ -772,8 +772,7 @@ HexagonTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI, } else { MachinePointerInfo LocPI = MachinePointerInfo::getStack( DAG.getMachineFunction(), LocMemOffset); - SDValue S = DAG.getStore(Chain, dl, Arg, MemAddr, LocPI, false, - false, 0); + SDValue S = DAG.getStore(Chain, dl, Arg, MemAddr, LocPI); MemOpChains.push_back(S); } continue; @@ -1180,9 +1179,8 @@ SDValue HexagonTargetLowering::LowerFormalArguments( // location. InVals.push_back(FIN); } else { - InVals.push_back(DAG.getLoad(VA.getLocVT(), dl, Chain, FIN, - MachinePointerInfo(), false, false, - false, 0)); + InVals.push_back( + DAG.getLoad(VA.getLocVT(), dl, Chain, FIN, MachinePointerInfo())); } } } @@ -1210,9 +1208,8 @@ HexagonTargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) const { HexagonMachineFunctionInfo *QFI = MF.getInfo<HexagonMachineFunctionInfo>(); SDValue Addr = DAG.getFrameIndex(QFI->getVarArgsFrameIndex(), MVT::i32); const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue(); - return DAG.getStore(Op.getOperand(0), SDLoc(Op), Addr, - Op.getOperand(1), MachinePointerInfo(SV), false, - false, 0); + return DAG.getStore(Op.getOperand(0), SDLoc(Op), Addr, Op.getOperand(1), + MachinePointerInfo(SV)); } // Creates a SPLAT instruction for a constant value VAL. @@ -1338,20 +1335,14 @@ SDValue HexagonTargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const { SDValue Loads[4]; // Base load. Loads[0] = DAG.getExtLoad(Ext, DL, MVT::i32, Chain, Base, - LoadNode->getPointerInfo(), MVT::i16, - LoadNode->isVolatile(), - LoadNode->isNonTemporal(), - LoadNode->isInvariant(), - Alignment); + LoadNode->getPointerInfo(), MVT::i16, Alignment, + LoadNode->getMemOperand()->getFlags()); // Base+2 load. SDValue Increment = DAG.getConstant(2, DL, MVT::i32); Ptr = DAG.getNode(ISD::ADD, DL, Base.getValueType(), Base, Increment); Loads[1] = DAG.getExtLoad(Ext, DL, MVT::i32, Chain, Ptr, - LoadNode->getPointerInfo(), MVT::i16, - LoadNode->isVolatile(), - LoadNode->isNonTemporal(), - LoadNode->isInvariant(), - Alignment); + LoadNode->getPointerInfo(), MVT::i16, Alignment, + LoadNode->getMemOperand()->getFlags()); // SHL 16, then OR base and base+2. SDValue ShiftAmount = DAG.getConstant(16, DL, MVT::i32); SDValue Tmp1 = DAG.getNode(ISD::SHL, DL, MVT::i32, Loads[1], ShiftAmount); @@ -1360,20 +1351,14 @@ SDValue HexagonTargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const { Increment = DAG.getConstant(4, DL, MVT::i32); Ptr = DAG.getNode(ISD::ADD, DL, Base.getValueType(), Base, Increment); Loads[2] = DAG.getExtLoad(Ext, DL, MVT::i32, Chain, Ptr, - LoadNode->getPointerInfo(), MVT::i16, - LoadNode->isVolatile(), - LoadNode->isNonTemporal(), - LoadNode->isInvariant(), - Alignment); + LoadNode->getPointerInfo(), MVT::i16, Alignment, + LoadNode->getMemOperand()->getFlags()); // Base + 6. Increment = DAG.getConstant(6, DL, MVT::i32); Ptr = DAG.getNode(ISD::ADD, DL, Base.getValueType(), Base, Increment); Loads[3] = DAG.getExtLoad(Ext, DL, MVT::i32, Chain, Ptr, - LoadNode->getPointerInfo(), MVT::i16, - LoadNode->isVolatile(), - LoadNode->isNonTemporal(), - LoadNode->isInvariant(), - Alignment); + LoadNode->getPointerInfo(), MVT::i16, Alignment, + LoadNode->getMemOperand()->getFlags()); // SHL 16, then OR base+4 and base+6. Tmp1 = DAG.getNode(ISD::SHL, DL, MVT::i32, Loads[3], ShiftAmount); SDValue Tmp4 = DAG.getNode(ISD::OR, DL, MVT::i32, Tmp1, Loads[2]); @@ -1386,8 +1371,8 @@ SDValue HexagonTargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const { } else { // Perform default type expansion. Result = DAG.getLoad(MVT::i64, DL, Chain, Ptr, LoadNode->getPointerInfo(), - LoadNode->isVolatile(), LoadNode->isNonTemporal(), - LoadNode->isInvariant(), LoadNode->getAlignment()); + LoadNode->getAlignment(), + LoadNode->getMemOperand()->getFlags()); LoadChain = Result.getValue(1); } } else @@ -1451,7 +1436,7 @@ HexagonTargetLowering::LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const { SDValue Offset = DAG.getConstant(4, dl, MVT::i32); return DAG.getLoad(VT, dl, DAG.getEntryNode(), DAG.getNode(ISD::ADD, dl, VT, FrameAddr, Offset), - MachinePointerInfo(), false, false, false, 0); + MachinePointerInfo()); } // Return LR, which contains the return address. Mark it an implicit live-in. @@ -1472,8 +1457,7 @@ HexagonTargetLowering::LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const { HRI.getFrameRegister(), VT); while (Depth--) FrameAddr = DAG.getLoad(VT, dl, DAG.getEntryNode(), FrameAddr, - MachinePointerInfo(), - false, false, false, 0); + MachinePointerInfo()); return FrameAddr; } @@ -1611,9 +1595,8 @@ HexagonTargetLowering::LowerToTLSInitialExecModel(GlobalAddressSDNode *GA, // Load the offset value for TLS symbol.This offset is relative to // thread pointer. - SDValue LoadOffset = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), Sym, - MachinePointerInfo(), - false, false, false, 0); + SDValue LoadOffset = + DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), Sym, MachinePointerInfo()); // Address of the thread local variable is the add of thread // pointer and the offset of the variable. @@ -2746,8 +2729,7 @@ HexagonTargetLowering::LowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const { SDValue StoreAddr = DAG.getNode(ISD::ADD, dl, PtrVT, DAG.getRegister(Hexagon::R30, PtrVT), DAG.getIntPtrConstant(4, dl)); - Chain = DAG.getStore(Chain, dl, Handler, StoreAddr, MachinePointerInfo(), - false, false, 0); + Chain = DAG.getStore(Chain, dl, Handler, StoreAddr, MachinePointerInfo()); Chain = DAG.getCopyToReg(Chain, dl, OffsetReg, Offset); // Not needed we already use it as explict input to EH_RETURN. |