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path: root/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
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* [Hexagon] Update AnalyzeBranch, etc target hooksBrendon Cahoon2015-05-081-6/+8
* Remove the remaining uses of abs64 and nuke it.Benjamin Kramer2015-03-091-1/+1
* [Hexagon] Renaming A2_subri, A2_andir, A2_orir. Fixing formatting.Colin LeMahieu2015-02-051-1/+1
* [Hexagon] Renaming A2_addi and formatting.Colin LeMahieu2015-02-051-4/+4
* Remove unused class variables and update calls to get the subtargetEric Christopher2015-02-021-11/+3
* [Hexagon] Removing old versions of cmph and updating references.Colin LeMahieu2015-01-141-1/+1
* [Hexagon] Deleting versions of compare-not that don't have encoding informati...Colin LeMahieu2015-01-141-2/+2
* [Hexagon] Removing old variants of instructions and updating references.Colin LeMahieu2014-12-191-1/+1
* [Hexagon] Adding loop0/1 sp0/1/2loop0 instructions.Colin LeMahieu2014-12-191-6/+6
* Reverting 224550, was not ready for commit.Colin LeMahieu2014-12-181-6/+6
* [Hexagon] Adding loop0/1 sp0/1/2loop0 instructions.Colin LeMahieu2014-12-181-6/+6
* [Hexagon] Updating doubleword shift usages to new versions.Colin LeMahieu2014-12-161-1/+1
* [Hexagon] Adding encodings for JR class instructions. Updating complier usages.Colin LeMahieu2014-12-101-2/+2
* [Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests.Colin LeMahieu2014-12-091-4/+4
* [Hexagon] Adding cmp* immediate form instructions.Colin LeMahieu2014-11-261-3/+3
* [Hexagon] Replacing cmp* instructions with ones that contain encoding bits.Colin LeMahieu2014-11-251-3/+3
* [Hexagon] Removing SUB_rr and replacing with A2_sub.Colin LeMahieu2014-11-211-1/+1
* Minor spelling correction.Sid Manning2014-08-281-1/+1
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-3/+6
* [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final...Craig Topper2014-04-291-3/+3
* [C++] Use 'nullptr'. Target edition.Craig Topper2014-04-251-49/+49
* [Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-1/+2
* Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changingOwen Anderson2014-03-131-5/+5
* [C++11] Replace llvm::next and llvm::prior with std::next and std::prev.Benjamin Kramer2014-03-021-5/+5
* Fix known typosAlp Toker2014-01-241-2/+2
* Re-sort all of the includes with ./utils/sort_includes.py so thatChandler Carruth2014-01-071-3/+2
* Replace some unnecessary vector copies with references.Benjamin Kramer2013-09-151-1/+1
* Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector s...Craig Topper2013-07-141-4/+4
* Hexagon: Use multiclass for Jump instructions.Jyotsna Verma2013-05-011-2/+2
* Hexagon: Remove assembler mapped instruction definitions.Jyotsna Verma2013-04-231-6/+0
* Remove unused typedef.Duncan Sands2013-04-011-1/+0
* Switch to LLVM support function abs64 to keep VS2008 happy.Tim Northover2013-03-271-1/+1
* Extend Hexagon hardware loop generation to handle various additional cases:Krzysztof Parzyszek2013-02-111-382/+1283
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-021-1/+1
* In hexagon convertToHardwareLoop, don't deref end() iteratorMatthew Curtis2012-12-071-7/+14
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-3/+3
* Don't use getNextOperandForReg().Jakob Stoklund Olesen2012-08-081-1/+4
* Fix typos found by http://github.com/lyda/misspell-checkBenjamin Kramer2012-06-021-1/+1
* Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change s...Craig Topper2012-04-201-1/+1
* Reorder includes in Target backends to following coding standards. Remove som...Craig Topper2012-03-171-2/+2
* Optimize redundant sign extends and negation of predicates.Sirish Pande2012-02-151-2/+2
* Revert "Optimize redundant sign extends and negation of predicates"Eric Christopher2012-02-151-2/+2
* Optimize redundant sign extends and negation of predicatesSirish Pande2012-02-151-2/+2
* Hexagon backend supportTony Linthicum2011-12-121-0/+644
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