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path: root/llvm/lib/Target/CellSPU/SPUISelLowering.cpp
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* Convert assert(0) to llvm_unreachableCraig Topper2012-02-071-4/+2
* More dead code removal (using -Wunreachable-code)David Blaikie2012-01-201-15/+0
* Remove VectorExtras. This unused helper was written for a type of API that is...Benjamin Kramer2012-01-071-1/+0
* Initial CodeGen support for CTTZ/CTLZ where a zero input produces anChandler Carruth2011-12-131-0/+10
* Added invariant field to the DAG.getLoad method and changed all calls.Pete Cooper2011-11-081-5/+8
* Fix a bug in LowerV2I64Splat, which generated a BUILD_VECTOR for which there wasNadav Rotem2011-10-161-3/+5
* The CELL backend cannot select patterns for vector trunc-store and shl on v2...Nadav Rotem2011-10-151-0/+9
* Set operation actions to legal types only.Nadav Rotem2011-10-041-8/+9
* Operations should be custom lowered only if their type is legal.Nadav Rotem2011-10-041-6/+8
* Add codegen support for vector select (in the IR this means a selectDuncan Sands2011-09-061-1/+2
* Silence a bunch (but not all) "variable written but not read" warningsDuncan Sands2011-08-121-0/+1
* Code generation for 'fence' instruction.Eli Friedman2011-07-271-0/+1
* land David Blaikie's patch to de-constify Type, with a few tweaks.Chris Lattner2011-07-181-4/+4
* Next round of MC refactoring. This patch factor MC table instantiations, MCEvan Cheng2011-07-141-1/+0
* Add an intrinsic and codegen support for fused multiply-accumulate. The intentCameron Zwarich2011-07-081-0/+3
* Add a parameter to CCState so that it can access the MachineFunction.Eric Christopher2011-06-081-8/+8
* Have LowerOperandForConstraint handle multiple character constraints.Eric Christopher2011-06-021-2/+2
* Use the correct register class for Cell varargs spilling. This fixes all of theCameron Zwarich2011-05-191-1/+1
* Make the logic for determining function alignment more explicit. No function...Eli Friedman2011-05-061-5/+2
* Fix a ton of comment typos found by codespell. Patch byChris Lattner2011-04-151-1/+1
* Allow targets to specify a the type of the RHS of a shift parameterized on th...Owen Anderson2011-02-251-3/+2
* Revert r124611 - "Keep track of incoming argument's location while emitting L...Devang Patel2011-02-211-1/+1
* Keep track of incoming argument's location while emitting LiveIns.Devang Patel2011-01-311-1/+1
* Allow sign-extending of i8 and i16 to i128 on SPU. Kalle Raiskila2011-01-201-0/+6
* Remove unused variables found by gcc-4.6's -Wunused-but-set-variable.Jeffrey Yasskin2011-01-181-9/+0
* Don't crash SPU BE with memory accesses with big alignmnet.Kalle Raiskila2011-01-171-4/+4
* Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs a...Anton Korobeynikov2011-01-101-7/+6
* rename MVT::Flag to MVT::Glue. "Flag" is a terrible name forChris Lattner2010-12-211-1/+1
* Use i8 as SETCC result type for i1 in SPU.Kalle Raiskila2010-11-241-4/+14
* Division by pow-of-2 is not cheap on SPU, do it with Kalle Raiskila2010-11-231-2/+0
* Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.Wesley Peck2010-11-231-92/+92
* Fix a bug with extractelement on SPU.Kalle Raiskila2010-11-221-1/+1
* Improve code layout, mostly indentation. Kalle Raiskila2010-11-151-166/+150
* Fix memory access lowering on SPU, addingKalle Raiskila2010-11-121-102/+219
* Simplify uses of MVT and EVT. An MVT can be compared directlyDuncan Sands2010-11-031-1/+1
* Inline asm multiple alternative constraints development phase 2 - improved ba...John Thompson2010-10-291-0/+33
* Improve lowering of sext to i128 on SPU.Kalle Raiskila2010-10-181-2/+7
* Implement two virtual functions in SPUTargetLowering.Kalle Raiskila2010-10-071-0/+26
* update a bunch of code to use the MachinePointerInfo version of getStore.Chris Lattner2010-09-211-3/+4
* it's more elegant to put the "getConstantPool" andChris Lattner2010-09-211-3/+4
* Silence compiler warning.Kalle Raiskila2010-09-091-1/+1
* Fix CellSPU vector shuffles, again.Kalle Raiskila2010-09-081-7/+7
* Fix lowering of INSERT_VECTOR_ELT in SPU. Kalle Raiskila2010-08-291-3/+4
* Fix SPU BE to use all the available return registers.Kalle Raiskila2010-08-241-34/+16
* Remove some dead code from SPU BE that remainedKalle Raiskila2010-08-241-18/+6
* Fix a bug with insertelement on SPU. Kalle Raiskila2010-08-181-6/+11
* Remove all traces of v2[i,f]32 on SPU. Kalle Raiskila2010-08-181-27/+0
* Have SPU handle halfvec stores aligned by 8 bytes.Kalle Raiskila2010-08-091-9/+26
* Make SPU backend handle insertelement and Kalle Raiskila2010-08-041-1/+4
* More SPU v2f32 stuff added: insertelement and shuffle.Kalle Raiskila2010-08-021-0/+1
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