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authorKalle Raiskila <kalle.raiskila@nokia.com>2011-01-20 15:49:06 +0000
committerKalle Raiskila <kalle.raiskila@nokia.com>2011-01-20 15:49:06 +0000
commit6e5a54b36c083542d8f987929111043a0afb1c07 (patch)
tree3a965d909d1ee7eadab150ed2caabf4ebf29270f /llvm/lib/Target/CellSPU/SPUISelLowering.cpp
parent8fb2c3827c2e85edca529380ae9e125713884126 (diff)
downloadbcm5719-llvm-6e5a54b36c083542d8f987929111043a0afb1c07.tar.gz
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Allow sign-extending of i8 and i16 to i128 on SPU.
llvm-svn: 123912
Diffstat (limited to 'llvm/lib/Target/CellSPU/SPUISelLowering.cpp')
-rw-r--r--llvm/lib/Target/CellSPU/SPUISelLowering.cpp6
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/CellSPU/SPUISelLowering.cpp b/llvm/lib/Target/CellSPU/SPUISelLowering.cpp
index 36c8bd56846..e218fb92d1c 100644
--- a/llvm/lib/Target/CellSPU/SPUISelLowering.cpp
+++ b/llvm/lib/Target/CellSPU/SPUISelLowering.cpp
@@ -2719,6 +2719,12 @@ static SDValue LowerSIGN_EXTEND(SDValue Op, SelectionDAG &DAG)
SDValue Op0 = Op.getOperand(0);
MVT Op0VT = Op0.getValueType().getSimpleVT();
+ // extend i8 & i16 via i32
+ if (Op0VT == MVT::i8 || Op0VT == MVT::i16) {
+ Op0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i32, Op0);
+ Op0VT = MVT::i32;
+ }
+
// The type to extend to needs to be a i128 and
// the type to extend from needs to be i64 or i32.
assert((OpVT == MVT::i128 && (Op0VT == MVT::i64 || Op0VT == MVT::i32)) &&
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