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| author | Duncan Sands <baldrick@free.fr> | 2011-08-12 14:54:45 +0000 |
|---|---|---|
| committer | Duncan Sands <baldrick@free.fr> | 2011-08-12 14:54:45 +0000 |
| commit | a41634e307caa823b1e050eb8b4f67fdf4b8e415 (patch) | |
| tree | 0172f17f10f9238b605692f703516f3d271ff563 /llvm/lib/Target/CellSPU/SPUISelLowering.cpp | |
| parent | 50aa2d480ced9bb792d438f6ff92fe06afa6b84e (diff) | |
| download | bcm5719-llvm-a41634e307caa823b1e050eb8b4f67fdf4b8e415.tar.gz bcm5719-llvm-a41634e307caa823b1e050eb8b4f67fdf4b8e415.zip | |
Silence a bunch (but not all) "variable written but not read" warnings
when building with assertions disabled.
llvm-svn: 137460
Diffstat (limited to 'llvm/lib/Target/CellSPU/SPUISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/CellSPU/SPUISelLowering.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/CellSPU/SPUISelLowering.cpp b/llvm/lib/Target/CellSPU/SPUISelLowering.cpp index 59337bceff5..1a081e9e6d7 100644 --- a/llvm/lib/Target/CellSPU/SPUISelLowering.cpp +++ b/llvm/lib/Target/CellSPU/SPUISelLowering.cpp @@ -2728,6 +2728,7 @@ static SDValue LowerSIGN_EXTEND(SDValue Op, SelectionDAG &DAG) // the type to extend from needs to be i64 or i32. assert((OpVT == MVT::i128 && (Op0VT == MVT::i64 || Op0VT == MVT::i32)) && "LowerSIGN_EXTEND: input and/or output operand have wrong size"); + (void)OpVT; // Create shuffle mask unsigned mask1 = 0x10101010; // byte 0 - 3 and 4 - 7 |
