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path: root/llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp
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* AArch64/ARM64: move ARM64 into AArch64's placeTim Northover2014-05-241-1312/+0
* ARM64: remove '#' from annotation of add/sub immediateTim Northover2014-05-221-1/+1
* ARM64: separate load/store operands to simplify assemblerTim Northover2014-05-221-44/+27
* [ARM64] Split tbz/tbnz into W/X register variantBradley Smith2014-05-191-12/+0
* TableGen: fix operand counting for aliasesTim Northover2014-05-161-65/+0
* TableGen: use correct MIOperand when printing aliasesTim Northover2014-05-151-16/+0
* [ARM64] Add condition code operand type such that proper diagnostics can be e...Bradley Smith2014-05-151-6/+0
* Fix typosAlp Toker2014-05-151-2/+2
* ARM64: remove unneeded InstPrinter hacksTim Northover2014-05-141-32/+0
* TableGen: use PrintMethods to print more aliasesTim Northover2014-05-121-12/+8
* ARM64: merge "extend" and "shift" addressing-mode enums.Tim Northover2014-05-121-5/+5
* ARM64: refactor NEON post-indexed loads & stores (MC).Tim Northover2014-05-021-347/+348
* AArch64/ARM64: print BFM instructions as BFI or BFXILTim Northover2014-05-011-0/+27
* [ARM64] Conditionalize CPU specific system registers on subtarget featuresBradley Smith2014-05-011-2/+2
* ARM64: print fp immediates without using scientific notation.Tim Northover2014-04-301-6/+4
* AArch64/ARM64: expunge CPSR from the sourcesTim Northover2014-04-301-2/+2
* ARM64: remove duplication by templating InstPrinter methodsTim Northover2014-04-301-123/+8
* ARM64: hexify printing various immediate operandsTim Northover2014-04-301-0/+6
* ARM64: print canonical syntax for add/sub (imm) instructions.Tim Northover2014-04-301-3/+5
* [ARM64] Print preferred aliases for SFBM/UBFM in InstPrinterBradley Smith2014-04-251-6/+29
* [C++] Use 'nullptr'. Target edition.Craig Topper2014-04-251-5/+5
* AArch64/ARM64: disentangle the "B.CC" and "LDR lit" operandsTim Northover2014-04-241-3/+2
* [Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-1/+2
* ARM64: [su]xtw use W regs as inputs, not X regs.Jim Grosbach2014-04-171-4/+8
* Fix abuse of StringRef on ARM64SysReg::MRSMapper::toString(Val, Valid).NAKAMURA Takumi2014-04-101-4/+4
* [ARM64] Change SYS without a register to an alias to make disassembling more ...Bradley Smith2014-04-091-5/+6
* [ARM64] Correctly disassemble ISB operand as ISB not DBarrier.Bradley Smith2014-04-091-1/+6
* [ARM64] Conditional branches must always print their condition code, even AL.Bradley Smith2014-04-091-2/+1
* [ARM64] When printing a pre-indexed address with #0, the ', #0' is not optional.Bradley Smith2014-04-091-0/+13
* [ARM64] Add missing shifted register MVN alias to ORNBradley Smith2014-04-091-0/+8
* [ARM64] SXTW/UXTW are only valid aliases for 32-bit operations.Bradley Smith2014-04-091-1/+3
* [ARM64] Fix canonicalisation of MOVs. MOV is too complex to be modelled by a ...Bradley Smith2014-04-091-1/+33
* [ARM64] Tighten up the special casing in emitting arithmetic extends. UXTW sh...Bradley Smith2014-04-091-2/+4
* [ARM64] Add missing tlbi operands and error for extra/missing register on tlb...Bradley Smith2014-04-091-0/+14
* [ARM64] Remove PrefetchOp and use ARM64PRFM instead.Bradley Smith2014-04-091-2/+4
* [ARM64] Move CPSRField and DBarrier operands over to AArch64-style disassembl...Bradley Smith2014-04-091-4/+11
* [ARM64] Switch the decoder, disassembler, instprinter and asmparser over to u...Bradley Smith2014-04-091-13/+18
* [ARM64] Move ARM64BaseInfo.{cpp,h} into a Utils/ subdirectory, a la AArch64. ...Bradley Smith2014-04-091-1/+1
* ARM64: format register strings without creating a local Twine.Tim Northover2014-03-291-5/+5
* ARM64: change format specifier to work on 32-bit targetsTim Northover2014-03-291-1/+1
* [ARM64] Fix 'assert("...")' to be 'assert(0 && "...")'. Otherwise, it isChandler Carruth2014-03-291-1/+1
* ARM64: initial backend importTim Northover2014-03-291-0/+1428
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