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| author | Jim Grosbach <grosbach@apple.com> | 2014-04-17 20:47:31 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2014-04-17 20:47:31 +0000 |
| commit | 0fba6d98fcb0438f1fc4f0c67e989f49843762ec (patch) | |
| tree | fe3f261810f1755fc830e8cc945b5219e0dd5cc2 /llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp | |
| parent | 4b600d3f0b923b5f8c1d39bb944e12e370c10013 (diff) | |
| download | bcm5719-llvm-0fba6d98fcb0438f1fc4f0c67e989f49843762ec.tar.gz bcm5719-llvm-0fba6d98fcb0438f1fc4f0c67e989f49843762ec.zip | |
ARM64: [su]xtw use W regs as inputs, not X regs.
Update the SXT[BHW]/UXTW instruction aliases and the shifted reg addressing
mode handling.
PR19455 and rdar://16650642
llvm-svn: 206495
Diffstat (limited to 'llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp b/llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp index cd410ab4597..5c2cea9a1f8 100644 --- a/llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp +++ b/llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp @@ -104,7 +104,7 @@ void ARM64InstPrinter::printInst(const MCInst *MI, raw_ostream &O, if (AsmMnemonic) { O << '\t' << AsmMnemonic << '\t' << getRegisterName(Op0.getReg()) - << ", " << getRegisterName(Op1.getReg()); + << ", " << getRegisterName(getWRegFromXReg(Op1.getReg())); printAnnotation(O, Annot); return; } @@ -1253,11 +1253,15 @@ void ARM64InstPrinter::printMemoryPostIndexed(const MCInst *MI, unsigned OpNum, void ARM64InstPrinter::printMemoryRegOffset(const MCInst *MI, unsigned OpNum, raw_ostream &O, int LegalShiftAmt) { - O << '[' << getRegisterName(MI->getOperand(OpNum).getReg()) << ", " - << getRegisterName(MI->getOperand(OpNum + 1).getReg()); - unsigned Val = MI->getOperand(OpNum + 2).getImm(); ARM64_AM::ExtendType ExtType = ARM64_AM::getMemExtendType(Val); + + O << '[' << getRegisterName(MI->getOperand(OpNum).getReg()) << ", "; + if (ExtType == ARM64_AM::UXTW || ExtType == ARM64_AM::SXTW) + O << getRegisterName(getWRegFromXReg(MI->getOperand(OpNum + 1).getReg())); + else + O << getRegisterName(MI->getOperand(OpNum + 1).getReg()); + bool DoShift = ARM64_AM::getMemDoShift(Val); if (ExtType == ARM64_AM::UXTX) { |
