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path: root/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
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* Fixed disassembler for vstm/vldm ARM VFP instructions.Silviu Baranga2012-05-031-4/+6
* ARM: Tweak tADDrSP definition for consistent operand order.Jim Grosbach2012-04-271-1/+1
* Refactor IT handling not to store the bottom bit of the condition code in the...Richard Barton2012-04-271-8/+3
* Refactor Thumb ITState handling in ARM Disassembler to more efficiently use i...Richard Barton2012-04-241-31/+69
* Added support for disassembling unpredictable swp/swpb ARM instructions.Silviu Baranga2012-04-181-0/+4
* Added support for unpredictable mcrr/mcrr2/mrrc/mrrc2 ARM instruction in the ...Silviu Baranga2012-04-181-0/+30
* Fix ARM disassembly of VLD2 (single 2-element structure to all lanes)Kevin Enderby2012-04-171-7/+1
* Fix a few more places in the ARM disassembler so that branches getKevin Enderby2012-04-121-4/+29
* Fixed a case of ARM disassembly getting an assert on a bad encodingKevin Enderby2012-04-111-0/+2
* Fix ARM disassembly of VLD instructions with writebacks.  And add test a caseKevin Enderby2012-04-111-0/+12
* ARMDisassembler: drop bogus dependency on ARMCodeGenDylan Noblesmith2012-04-031-2/+1
* Remove unnecessary llvm:: qualificationsCraig Topper2012-03-271-209/+209
* Added soft fail checks for the disassembler when decoding some corner cases o...Silviu Baranga2012-03-221-1/+81
* Added soft fail cases for the disassembler when decoding LDRSBT, LDRHT or LDR...Silviu Baranga2012-03-221-3/+31
* Fix ARM disassembly of VST1 and VST2 instructions with writeback. And add testKevin Enderby2012-03-211-0/+19
* The ARM instructions that have an unpredictable behavior when the pc register...Silviu Baranga2012-03-201-2/+8
* Use uint16_t to store registers and opcode in static tables in the target spe...Craig Topper2012-03-111-6/+6
* Tidy up. Remove dead code that slipped into previous commit.Jim Grosbach2012-03-071-6/+0
* ARM more NEON VLD/VST composite physical register refactoring.Jim Grosbach2012-03-061-0/+7
* ARM refactor more NEON VLD/VST instructions to use composite physregsJim Grosbach2012-03-061-25/+41
* Fix a bug in the ARM disassembly of the neon VLD2 all lanes instruction.Kevin Enderby2012-03-061-7/+7
* ARM Refactor VLD/VST spaced pair instructions.Jim Grosbach2012-03-051-0/+50
* ARM refactor away a bunch of VLD/VST pseudo instructions.Jim Grosbach2012-03-051-6/+89
* Make MemoryObject accessor members const againDerek Schuff2012-02-291-4/+4
* Fix the symbolic operand added for the C disassmbler API for the ARM blKevin Enderby2012-02-271-1/+1
* Updated the llvm-mc disassembler C API to support for the X86 target.Kevin Enderby2012-02-231-33/+35
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-1/+1
* Make the EDis tables const.Benjamin Kramer2012-02-111-4/+4
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-071-1/+1
* Enable streaming of bitcodeDerek Schuff2012-02-061-4/+4
* More dead code removal (using -Wunreachable-code)David Blaikie2012-01-201-1/+1
* ARM NEON VTBL/VTBX assembly parsing and encoding.Jim Grosbach2011-12-151-4/+1
* ARM NEON refactor VST2 w/ writeback instructions.Jim Grosbach2011-12-141-9/+18
* ARM NEON VST2 assembly parsing and encoding.Jim Grosbach2011-12-141-30/+0
* ARM assembly parsing and encoding for VLD2 with writeback.Jim Grosbach2011-12-091-9/+18
* Remove unused variableMatt Beaumont-Gay2011-11-301-2/+0
* ARM parsing for VLD1 all lanes, with writeback.Jim Grosbach2011-11-301-10/+6
* ARM assembly parsing and encoding for four-register VST1.Jim Grosbach2011-11-291-28/+8
* ARM assembly parsing and encoding for three-register VST1.Jim Grosbach2011-11-291-20/+8
* Fix a misplaced paren bug.Owen Anderson2011-11-151-1/+1
* Fix an ambiguous decoding where we failed to properly decode VMOVv2f32 and VM...Owen Anderson2011-11-151-8/+62
* Re-apply 144430, this time with the associated isel and disassmbler bits.Jim Grosbach2011-11-121-4/+0
* Remove the unnecessary dependency on libARMCodeGen from libARMDisassembler.Benjamin Kramer2011-11-111-1/+1
* The rules disallowing single-register reglist operands only apply to the POP ...Owen Anderson2011-11-021-5/+1
* Register list operands are not allowed to contain only a single register. Al...Owen Anderson2011-11-021-1/+5
* Fix disassembly of some VST1 instructions.Owen Anderson2011-11-011-5/+19
* ARM VST1 w/ writeback assembly parsing and encoding.Jim Grosbach2011-10-311-12/+16
* More not-crashing NEON disassembly updates for the vld refactoring.Owen Anderson2011-10-311-0/+4
* Reapply r143202, with a manual decoding hook for SWP. This change inadvertan...Owen Anderson2011-10-281-0/+24
* Add some NEON stores to the VLD decoding hook that were accidentally omitted ...Owen Anderson2011-10-271-0/+4
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