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| author | Kevin Enderby <enderby@apple.com> | 2012-04-11 00:25:40 +0000 |
|---|---|---|
| committer | Kevin Enderby <enderby@apple.com> | 2012-04-11 00:25:40 +0000 |
| commit | d2980cd0417fbd0c93981e8e26675e3e2653827f (patch) | |
| tree | f239e5f3197d9b2458308223d34f5ab8b8c71360 /llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | 37a0a24a5fdc05e18770661b4ee13a91893dee1a (diff) | |
| download | bcm5719-llvm-d2980cd0417fbd0c93981e8e26675e3e2653827f.tar.gz bcm5719-llvm-d2980cd0417fbd0c93981e8e26675e3e2653827f.zip | |
Fix ARM disassembly of VLD instructions with writebacks. And add test a case
for all opcodes handed by DecodeVLDInstruction() in ARMDisassembler.cpp .
llvm-svn: 154459
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index dba5b6ef821..e1d63fac906 100644 --- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -2262,6 +2262,8 @@ static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Insn, case ARM::VLD2b8wb_register: case ARM::VLD2b16wb_register: case ARM::VLD2b32wb_register: + Inst.addOperand(MCOperand::CreateImm(0)); + break; case ARM::VLD3d8_UPD: case ARM::VLD3d16_UPD: case ARM::VLD3d32_UPD: @@ -2330,6 +2332,16 @@ static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Insn, !Check(S, DecodeGPRRegisterClass(Inst, Rm, Address, Decoder))) return MCDisassembler::Fail; break; + case ARM::VLD2d8wb_fixed: + case ARM::VLD2d16wb_fixed: + case ARM::VLD2d32wb_fixed: + case ARM::VLD2b8wb_fixed: + case ARM::VLD2b16wb_fixed: + case ARM::VLD2b32wb_fixed: + case ARM::VLD2q8wb_fixed: + case ARM::VLD2q16wb_fixed: + case ARM::VLD2q32wb_fixed: + break; } return S; |
