| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | GlobalISel: Add type argument to getRegBankFromRegClass | Matt Arsenault | 2020-01-03 | 1 | -2/+2 |
| * | Update the file headers across all of the LLVM projects in the monorepo | Chandler Carruth | 2019-01-19 | 1 | -4/+3 |
| * | [RegisterBankInfo] Uniquely allocate instruction mapping. | Quentin Colombet | 2017-05-05 | 1 | -1/+2 |
| * | [globalisel][arm] Tablegen-erate current Register Bank Information. | Daniel Sanders | 2017-02-05 | 1 | -6/+7 |
| * | [ARM] GlobalISel: Select add i32, i32 | Diana Picus | 2016-12-16 | 1 | -0/+12 |
| * | [ARM] Add plumbing for GlobalISel | Diana Picus | 2016-11-11 | 1 | -0/+29 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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