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authorDiana Picus <diana.picus@linaro.org>2016-11-11 08:27:37 +0000
committerDiana Picus <diana.picus@linaro.org>2016-11-11 08:27:37 +0000
commit22274934f43681dc37d5bf39f99308ce443308d9 (patch)
tree6610b358258b5d0f0fa467733178bbd199a16b7c /llvm/lib/Target/ARM/ARMRegisterBankInfo.h
parenta6adab268d10db41f8adb660ecfcdaceaa9e57da (diff)
downloadbcm5719-llvm-22274934f43681dc37d5bf39f99308ce443308d9.tar.gz
bcm5719-llvm-22274934f43681dc37d5bf39f99308ce443308d9.zip
[ARM] Add plumbing for GlobalISel
Add GlobalISel skeleton, up to the point where we can select a ret void. llvm-svn: 286573
Diffstat (limited to 'llvm/lib/Target/ARM/ARMRegisterBankInfo.h')
-rw-r--r--llvm/lib/Target/ARM/ARMRegisterBankInfo.h29
1 files changed, 29 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMRegisterBankInfo.h b/llvm/lib/Target/ARM/ARMRegisterBankInfo.h
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+++ b/llvm/lib/Target/ARM/ARMRegisterBankInfo.h
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+//===- ARMRegisterBankInfo ---------------------------------------*- C++ -*-==//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+/// \file
+/// This file declares the targeting of the RegisterBankInfo class for ARM.
+/// \todo This should be generated by TableGen.
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_TARGET_ARM_ARMREGISTERBANKINFO_H
+#define LLVM_LIB_TARGET_ARM_ARMREGISTERBANKINFO_H
+
+#include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h"
+
+namespace llvm {
+
+class TargetRegisterInfo;
+
+/// This class provides the information for the target register banks.
+class ARMRegisterBankInfo final : public RegisterBankInfo {
+public:
+ ARMRegisterBankInfo(const TargetRegisterInfo &TRI);
+};
+} // End llvm namespace.
+#endif
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