bcm5719-llvm - Project Ortega BCM5719 LLVM

	Commit message (Collapse)	Author	Age	Files	Lines
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*	Add PredicateOperand to all ARM instructions that have the condition field.	Evan Cheng	2007-05-15	1	-16/+21
\| \| \| \|	llvm-svn: 37066
*	Rewrite of Thumb constant islands handling (exact allowance for padding	Dale Johannesen	2007-04-29	1	-3/+4
\| \| \| \| \| \|	around islands and jump tables). llvm-svn: 36573
*	Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion.	Evan Cheng	2007-04-26	1	-1/+1
\| \| \| \|	llvm-svn: 36483
*	Relex assertions to account for additional implicit def / use operands.	Evan Cheng	2007-04-25	1	-1/+1
\| \| \| \|	llvm-svn: 36430
*	Removed tabs everywhere except autogenerated & external files. Add make	Anton Korobeynikov	2007-04-16	1	-2/+2
\| \| \| \| \| \|	target for tabs checking. llvm-svn: 36146
*	Inverted logic.	Evan Cheng	2007-04-03	1	-1/+1
\| \| \| \|	llvm-svn: 35619
*	findRegisterUseOperand() changed.	Evan Cheng	2007-03-26	1	-2/+2
\| \| \| \|	llvm-svn: 35366
*	Fix naming inconsistencies.	Evan Cheng	2007-03-19	1	-2/+2
\| \| \| \|	llvm-svn: 35163
*	Spill / restore should avoid modifying the condition register.	Evan Cheng	2007-02-07	1	-2/+2
\| \| \| \|	llvm-svn: 33971
*	Copy and paste bug.	Evan Cheng	2007-01-30	1	-1/+11
\| \| \| \|	llvm-svn: 33658
*	Misseed thumb jumptable branch.	Evan Cheng	2007-01-30	1	-0/+1
\| \| \| \|	llvm-svn: 33656
*	Factor GetInstSize() out of constpool island pass.	Evan Cheng	2007-01-29	1	-1/+70
\| \| \| \|	llvm-svn: 33644
*	Make LABEL a builtin opcode.	Jim Laskey	2007-01-26	1	-4/+0
\| \| \| \|	llvm-svn: 33537
*	ARM backend contribution from Apple.	Evan Cheng	2007-01-19	1	-21/+384
\| \| \| \|	llvm-svn: 33353
*	Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead	Evan Cheng	2006-11-27	1	-2/+3
\| \| \| \| \| \|	of opcode and number of operands. llvm-svn: 31947
*	fix warning about missing newline at end of file	Rafael Espindola	2006-10-24	1	-1/+1
\| \| \| \|	llvm-svn: 31162
*	implement uncond branch insertion, mark branches with isBranch.	Chris Lattner	2006-10-24	1	-0/+8
\| \| \| \|	llvm-svn: 31160
*	add shifts to addressing mode 1	Rafael Espindola	2006-09-13	1	-3/+6
\| \| \| \|	llvm-svn: 30291
*	partial implementation of the ARM Addressing Mode 1	Rafael Espindola	2006-09-11	1	-7/+7
\| \| \| \|	llvm-svn: 30252
*	change the addressing mode of the str instruction to reg+imm	Rafael Espindola	2006-08-08	1	-0/+4
\| \| \| \|	llvm-svn: 29571
*	create the raddr addressing mode that matches any register and the frame index	Rafael Espindola	2006-07-10	1	-22/+0
\| \| \| \| \| \| \| \| \|	use raddr for the ldr instruction. This removes a dummy mov from the assembly output remove SelectFrameIndex remove isLoadFromStackSlot remove isStoreToStackSlot llvm-svn: 29079
*	handle the "mov reg1, reg2" case in isMoveInstr	Rafael Espindola	2006-06-27	1	-1/+13
\| \| \| \|	llvm-svn: 28945
*	implement minimal versions of	Rafael Espindola	2006-05-23	1	-5/+0
\| \| \| \| \| \| \| \|	ARMAsmPrinter::runOnMachineFunction LowerFORMAL_ARGUMENTS ARMInstrInfo::isMoveInstr llvm-svn: 28431
*	added a skeleton of the ARM backend	Rafael Espindola	2006-05-14	1	-0/+58
	llvm-svn: 28301