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path: root/llvm/lib/Target/ARM/ARMISelLowering.cpp
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* Revert "[ARM] Combine CMOV into BFI where possible"Renato Golin2015-11-091-115/+0
* [WinEH] Update exception pointer registersJoseph Tremoulet2015-11-071-7/+14
* [ARM] Compute known bits for ARMISD::CMOVJames Molloy2015-11-051-0/+10
* [ARM] Combine CMOV into BFI where possibleJames Molloy2015-11-041-0/+105
* ARM: add support for WatchOS's compact unwind information.Tim Northover2015-10-281-4/+4
* ARM: teach backend about WatchOS and TvOS libcalls.Tim Northover2015-10-281-23/+46
* [ARM] Expand ROTL and ROTR of vector value typesCharlie Turner2015-10-271-1/+5
* ARM/ELF: Restore original (pre-r251322) logic for deciding whether to use GOT.Peter Collingbourne2015-10-261-1/+1
* ARM/ELF: Better codegen for global variable addresses.Peter Collingbourne2015-10-261-32/+16
* Change makeLibCall to take an ArrayRef<SDValue> instead of pointer and size. ...Craig Topper2015-10-221-6/+6
* Adding support for TargetLoweringBase::LibCallArtyom Skrobov2015-10-201-2/+2
* ARM: Remove implicit ilist iterator conversions, NFCDuncan P. N. Exon Smith2015-10-191-10/+7
* Make a bunch of static arrays const.Craig Topper2015-10-181-3/+3
* [ARM] Promote helper function to SelectionDAG.Chad Rosier2015-10-071-34/+12
* [ARM] Use correct half-precision functions in EABI modeOliver Stannard2015-10-071-0/+8
* [ARM] Prevent PerformVDIVCombine from combining a vcvt/vdiv with 8 lanes.Chad Rosier2015-10-071-3/+4
* [ARM][AArch64] Only lower to interleaved load/store if the target has NEONJeroen Ketema2015-10-071-6/+7
* [ARM] Push more complex check down to reduce compile time. NFC.Chad Rosier2015-10-071-10/+10
* [ARM] Minor refactoring. NFC.Chad Rosier2015-10-061-2/+4
* [ARM] Minor refactoring. NFC.Chad Rosier2015-10-061-8/+10
* [ARM] Minor refactoring. NFC.Chad Rosier2015-10-061-9/+8
* [ARM] Minor refactoring to improve readability. NFC.Chad Rosier2015-10-061-13/+14
* [ARM] Modify codegen for memcpy intrinsic to prefer LDM/STM.Scott Douglass2015-10-051-0/+34
* [ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]la...Jeroen Ketema2015-09-301-6/+7
* [ARM] Avoid redundant checks for isThumb1Only() after supportsTailCall()Artyom Skrobov2015-09-281-21/+3
* [ARM] Don't generate clrex for pre-v7 targets.Ahmed Bougacha2015-09-261-0/+2
* ARM: make -Asserts,-Werror=unused-variable build happySaleem Abdulrasool2015-09-251-4/+4
* ARM: address WoA division limitationSaleem Abdulrasool2015-09-251-8/+131
* [ARM] Handle +t2dsp feature as an ArchExtKind in ARMTargetParser.defArtyom Skrobov2015-09-241-1/+1
* [ARM] Emit clrex in the expanded cmpxchg fail block.Ahmed Bougacha2015-09-221-0/+6
* [ARM] Do not scale vext with a factorJeroen Ketema2015-09-211-9/+1
* ARM: cleanup formattingSaleem Abdulrasool2015-09-201-2/+2
* propagate fast-math-flags on DAG nodesSanjay Patel2015-09-161-0/+5
* [CodeGen] Refactor TLI/AtomicExpand interface to make LLSC explicit.Ahmed Bougacha2015-09-111-5/+10
* [CodeGen] Rename AtomicRMWExpansionKind to AtomicExpansionKind.Ahmed Bougacha2015-09-111-3/+3
* [ARM] Do not use vtrn for vectorshuffle if the order is reversedJames Molloy2015-09-101-4/+13
* [ARM] Don't abort on variable-idx extractelt in ReconstructShuffle.Ahmed Bougacha2015-09-011-0/+4
* [CodeGen] Support (and default to) expanding READCYCLECOUNTER to 0.Ahmed Bougacha2015-08-281-30/+21
* [WinEH] Add some support for code generating catchpadReid Kleckner2015-08-271-4/+4
* [ARM] Use AEABI helpers for i64 div and remScott Douglass2015-08-241-5/+58
* [ARM] Refactor LowerDivRem before adding LowerREM (nfc)Scott Douglass2015-08-241-17/+36
* [ARM] Don't try and custom lower a vNi64 SETCC.James Molloy2015-08-201-0/+6
* [ARM] Add instruction selection patterns for vmin/vmaxSilviu Baranga2015-08-191-2/+20
* [ARM] Fix crash when targetting CPU without NEONJames Molloy2015-08-171-3/+3
* Rip out hand-rolled matching code for VMIN, VMAX, VMINNM and VMAXNMJames Molloy2015-08-171-194/+0
* [ARM] FMINNAN/FMAXNAN of f64 are not legal.James Molloy2015-08-131-2/+0
* PseudoSourceValue: Replace global manager with a manager in a machine function.Alex Lorenz2015-08-111-75/+92
* [ARM] Match fminnan/fmaxnan for vector vmin/vmax instead of an intrinsicJames Molloy2015-08-111-0/+16
* [ARM] Match fminnum/fmaxnum for vector vminnm/vmaxnm instead of an intrinsicJames Molloy2015-08-111-0/+12
* [ARM] Replace ARMISD::VMINNM/VMAXNM with ISD::FMINNUM/FMAXNUMJames Molloy2015-08-111-6/+8
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