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path: root/llvm/lib/Target/ARM/ARMISelLowering.cpp
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* ARM cannot select a pattern for trunc-store v4i8; /ARM/vrev.ll fails when pro...Nadav Rotem2011-10-151-0/+2
* Mark registers as DEAD because they're really just clobbers.Bill Wendling2011-10-151-1/+1
* Add missing correctness check to ARMTargetLowering::ReconstructShuffle. Fixe...Eli Friedman2011-10-141-0/+8
* Make sure that the register is in the register class before adding it as a ma...Bill Wendling2011-10-141-1/+3
* Mark the invoke call instruction as implicitly defining the callee-saved regi...Bill Wendling2011-10-141-2/+31
* Simplify and avoid undefined shift. Based on patch by Ahmed Charles.Eli Friedman2011-10-131-2/+1
* Reapply r141365 now that PR11107 is fixed.Bill Wendling2011-10-101-0/+80
* Revert r141365. It was causing MultiSource/Benchmarks/MiBench/consumer-lame toBill Wendling2011-10-101-80/+0
* Take all of the invoke basic blocks and make the dispatch basic block their newBill Wendling2011-10-071-4/+28
* Take the code that was emitted for the llvm.eh.dispatch.setup intrinsic and emitBill Wendling2011-10-071-0/+49
* Thread the chain through the eh.sjlj.setjmp intrinsic, like it's documented toBill Wendling2011-10-071-1/+2
* Reenable tail calls for iOS 5.0 and later.Bob Wilson2011-10-071-2/+2
* Reenable use of divmod compiler_rt functions for iOS 5.0 and later.Bob Wilson2011-10-071-0/+7
* Peephole optimization for ABS on ARM.Anton Korobeynikov2011-10-071-0/+80
* Use the correct vreg here.Bill Wendling2011-10-061-1/+1
* Generate the dispatch code for a 'thumb' function. This is very similar to theBill Wendling2011-10-061-2/+53
* Generate the dispatch table for ARM mode.Bill Wendling2011-10-061-29/+71
* Refactor some of the code that sets up the entry block for SjLj EH. No functi...Bill Wendling2011-10-061-79/+101
* Use a thumb ORR instead of thumb2 ORR when in thumb-only mode. (Picky! Picky!)Bill Wendling2011-10-061-7/+12
* * Set the low bit of the return address when we are in thumb mode.Bill Wendling2011-10-061-73/+90
* Add the MBBs before inserting the instructions. Doing it afterwards could leadBill Wendling2011-10-061-28/+10
* Get the proper call site numbers for the landing pads. Also remove a magicBill Wendling2011-10-051-15/+27
* Look at the number of entries in the jump table and jump to a 'trap' block ifBill Wendling2011-10-051-14/+50
* Checkpoint for SJLJ EH code.Bill Wendling2011-10-051-3/+75
* Use the PC label ID rather than '1'. Add support for thumb-2, because I heard...Bill Wendling2011-10-031-10/+41
* Check-pointing the new SjLj EH lowering.Bill Wendling2011-10-031-0/+74
* Use the new ARMConstantPoolSymbol class to handle external symbols.Bill Wendling2011-10-011-7/+9
* Switch over to using ARMConstantPoolConstant for global variables, functions,Bill Wendling2011-10-011-18/+21
* ARM fix encoding of VMOV.f32 and VMOV.f64 immediates.Jim Grosbach2011-09-301-46/+2
* Tighten a ARM dag combine condition to avoid an identity transformation, whichEvan Cheng2011-09-281-1/+1
* PR11004: Inline memcpy to avoid generating nested call sequence. Un-XFAIL 201...David Meyer2011-09-261-1/+3
* Lower ARM adds/subs to add/sub after adding optional CPSR operand.Andrew Trick2011-09-211-26/+26
* ARM isel bug fix for adds/subs operands.Andrew Trick2011-09-201-16/+57
* whitespaceAndrew Trick2011-09-201-13/+13
* Thumb2 assembly parsing and encoding for STR.Jim Grosbach2011-09-161-0/+13
* Minor cleanup.Eli Friedman2011-09-151-3/+2
* Use a more efficient lowering for Unordered/Monotonic atomic load/store on Th...Eli Friedman2011-09-151-2/+18
* Tidy up a few 80 column violations.Jim Grosbach2011-09-131-2/+3
* Thumb unconditional branches are allowed in IT blocks, and therefore should h...Owen Anderson2011-09-091-2/+4
* Thumb2 assembly parsing and encoding for LDREX/LDREXB/LDREXD/LDREXH.Jim Grosbach2011-09-091-9/+24
* Add codegen support for vector select (in the IR this means a selectDuncan Sands2011-09-061-5/+12
* Fix fall outs from my recent change on how carry bit is modeled during isel.Evan Cheng2011-09-061-1/+1
* Null-initialize to shut up -Wuninitialized warnings.Eli Friedman2011-09-011-1/+1
* 64-bit atomic cmpxchg for ARM.Eli Friedman2011-08-311-27/+74
* Some 64-bit atomic operations on ARM. 64-bit cmpxchg coming next.Eli Friedman2011-08-311-0/+179
* Follow up to r138791.Evan Cheng2011-08-301-0/+23
* Change ARM / Thumb2 addc / adde and subc / sube modeling to use physicalEvan Cheng2011-08-301-73/+38
* Expand ATOMIC_LOAD and ATOMIC_STORE for architectures I don't know well enoug...Eli Friedman2011-08-291-0/+1
* Silence GCC warnings and make an array const.Benjamin Kramer2011-08-271-3/+3
* Atomic load/store on ARM/Thumb.Eli Friedman2011-08-261-0/+2
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