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path: root/llvm/lib/Target/ARM/ARMISelLowering.cpp
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* Use const qualifiers with TargetLowering. This eliminates severalDan Gohman2010-04-171-27/+36
* Move per-function state out of TargetLowering subclasses and intoDan Gohman2010-04-171-12/+18
* Revise my previous change to ExpandBIT_CONVERT. I hadn't realized that thisBob Wilson2010-04-171-12/+22
* Use default lowering of DYNAMIC_STACKALLOC. As far as I can tell, ARM isle is...Evan Cheng2010-04-151-4/+1
* Fix build.Anders Carlsson2010-04-151-1/+1
* Add const qualifiers to CodeGen's use of LLVM IR constructs.Dan Gohman2010-04-151-6/+6
* Add -arm-long-calls option to force calls to be indirect. This makes theJim Grosbach2010-04-141-2/+44
* Don't custom lower bit converts to ARM VMOVDRRD or VMOVDRR when the operandBob Wilson2010-04-141-9/+16
* Handle a v2f64 formal parameter that is split between registers and memoryBob Wilson2010-04-131-7/+13
* Expand SELECT and SELECT_CC for NEON vector types.Bob Wilson2010-04-061-0/+2
* Reapply address space patch after fixing an issue in MemCopyOptimizer.Mon P Wang2010-04-041-4/+5
* Revert r100191 since it breaks objc in clang Mon P Wang2010-04-021-5/+4
* Reapply address space patch after fixing an issue in MemCopyOptimizer.Mon P Wang2010-04-021-4/+5
* Revert Mon Ping's change 99928, since it broke all the llvm-gcc buildbots.Bob Wilson2010-03-301-5/+4
* Added support for address spaces and added a isVolatile field to memcpy, memm...Mon P Wang2010-03-301-4/+5
* tweak the arm if conversion heuristicJim Grosbach2010-03-241-7/+1
* try being more permissive for if-conversion on ARM V7. see what the nightlyJim Grosbach2010-03-241-0/+9
* Revert this change, since it was causing ARM performance regressions.Bob Wilson2010-03-191-0/+54
* Get rid of target-specific fp <-> int nodes when still I'm here.Anton Korobeynikov2010-03-181-54/+0
* Get rid of target-specific nodes for fp16 <-> fp32 conversion.Anton Korobeynikov2010-03-181-13/+3
* Translate "cc" clobber in ARM inline assembly to ARM::CCRRegisterClass.Bob Wilson2010-03-151-0/+3
* Now that the default for Darwin platforms is to place the LSDA into the TEXTBill Wendling2010-03-151-1/+1
* Add substarget feature for FP16Anton Korobeynikov2010-03-141-1/+1
* Add codegen support for FP16 on ARMAnton Korobeynikov2010-03-141-10/+48
* The ARM EH experiment worked!Bill Wendling2010-03-091-30/+1
* This is part of an LLC-beta test used to test <rdar://problem/6804645>. PleaseBill Wendling2010-03-091-1/+31
* Remove dead parameter passing.Bill Wendling2010-03-021-2/+1
* Check for comparisons of +/- zero when optimizing less-than-or-equal andBob Wilson2010-02-241-22/+31
* LowerCall() should always do getCopyFromReg() to reference the stack pointer.Jim Grosbach2010-02-241-5/+1
* Use NEON vmin/vmax instructions for floating-point selects.Bob Wilson2010-02-181-8/+85
* Remove an assumption of default arguments. This is in anticipation of aDavid Greene2010-02-151-28/+49
* tighten up eh.setjmp sequence a bit.Jim Grosbach2010-02-081-3/+9
* Revert 95130.Evan Cheng2010-02-021-1/+1
* Pass callsite return type to TargetLowering::LowerCall and use that to check ...Evan Cheng2010-02-021-1/+1
* Fix a gross typo: ARMv6+ may or may not support unaligned memory operations.Anton Korobeynikov2010-01-301-2/+5
* Eliminate target hook IsEligibleForTailCallOptimization.Evan Cheng2010-01-271-1/+3
* Wrap some comments to 80 columns.Bob Wilson2010-01-191-2/+4
* Patch by David Conrad:Jim Grosbach2010-01-181-1/+16
* Name change for consistency. No functional change.Jim Grosbach2010-01-151-7/+7
* EmitAtomicCmpSwap() custome inserter needs to delete the MI passed in. EmitAt...Jim Grosbach2010-01-151-0/+3
* ARM "l" constraint for inline asm means R0-R7, also for Thumb2.Jakob Stoklund Olesen2010-01-141-2/+2
* Fix pastoJakob Stoklund Olesen2010-01-131-1/+1
* Add more plumbing. This time in the LowerArguments and "get" functions whichBill Wendling2009-12-221-1/+2
* Delete the instruction just before the function terminates for consistency sake.Evan Cheng2009-12-211-2/+3
* Fix libstdc++ build on ARM linux and part of PR5770.Rafael Espindola2009-12-181-0/+3
* Handle ARM inline asm "w" constraints with 64-bit ("d") registers.Bob Wilson2009-12-181-2/+2
* nand atomic requires opposite operand orderingJim Grosbach2009-12-151-3/+9
* Add ARMv6 memory and sync barrier instructionsJim Grosbach2009-12-141-6/+13
* Thumb2 atomic operationsJim Grosbach2009-12-141-44/+83
* atomic binary operations up to 32-bits wide.Jim Grosbach2009-12-141-5/+63
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