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| author | Jim Grosbach <grosbach@apple.com> | 2009-12-15 00:12:35 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2009-12-15 00:12:35 +0000 |
| commit | ea8f6e31a07e29963b696275de52a59f322550b6 (patch) | |
| tree | 4bda583c7def13f146012f8080f6147f3a8965e3 /llvm/lib/Target/ARM/ARMISelLowering.cpp | |
| parent | a5a166d01a732ecc7f09f4b763ae6b939df5f0ff (diff) | |
| download | bcm5719-llvm-ea8f6e31a07e29963b696275de52a59f322550b6.tar.gz bcm5719-llvm-ea8f6e31a07e29963b696275de52a59f322550b6.zip | |
nand atomic requires opposite operand ordering
llvm-svn: 91371
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index 7950ee02aeb..655c76265c7 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -3190,9 +3190,15 @@ ARMTargetLowering::EmitAtomicBinary(MachineInstr *MI, MachineBasicBlock *BB, // fallthrough --> exitMBB BB = loopMBB; AddDefaultPred(BuildMI(BB, dl, TII->get(ldrOpc), dest).addReg(ptr)); - if (BinOpcode) - AddDefaultPred(BuildMI(BB, dl, TII->get(BinOpcode), scratch2). - addReg(dest).addReg(incr)).addReg(0); + if (BinOpcode) { + // operand order needs to go the other way for NAND + if (BinOpcode == ARM::BICrr || BinOpcode == ARM::t2BICrr) + AddDefaultPred(BuildMI(BB, dl, TII->get(BinOpcode), scratch2). + addReg(incr).addReg(dest)).addReg(0); + else + AddDefaultPred(BuildMI(BB, dl, TII->get(BinOpcode), scratch2). + addReg(dest).addReg(incr)).addReg(0); + } AddDefaultPred(BuildMI(BB, dl, TII->get(strOpc), scratch).addReg(scratch2) .addReg(ptr)); |
