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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-01-14 18:19:56 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-01-14 18:19:56 +0000 |
| commit | 0ca14e44989b4c27d2e9e8d469520a85d7140c44 (patch) | |
| tree | e09254681f1f2ca7a5fe048fb7ad480351bdc710 /llvm/lib/Target/ARM/ARMISelLowering.cpp | |
| parent | 04b1152aacf98e118128d05829d6ddfbfffbc64a (diff) | |
| download | bcm5719-llvm-0ca14e44989b4c27d2e9e8d469520a85d7140c44.tar.gz bcm5719-llvm-0ca14e44989b4c27d2e9e8d469520a85d7140c44.zip | |
ARM "l" constraint for inline asm means R0-R7, also for Thumb2.
This is consistent with llvm-gcc's arm/constraints.md.
Certain instructions (e.g. CBZ, CBNZ) require a low register, even in Thumb2
mode.
llvm-svn: 93436
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index 6643b74dd02..275b30c9ae9 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -4258,10 +4258,10 @@ std::pair<unsigned, const TargetRegisterClass*> ARMTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const { if (Constraint.size() == 1) { - // GCC RS6000 Constraint Letters + // GCC ARM Constraint Letters switch (Constraint[0]) { case 'l': - if (Subtarget->isThumb1Only()) + if (Subtarget->isThumb()) return std::make_pair(0U, ARM::tGPRRegisterClass); else return std::make_pair(0U, ARM::GPRRegisterClass); |
