| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | CodeGen: TII: Take MachineInstr& in predicate API, NFC | Duncan P. N. Exon Smith | 2016-02-23 | 1 | -10/+10 |
| * | [ARM] Modify codegen for memcpy intrinsic to prefer LDM/STM. | Scott Douglass | 2015-10-05 | 1 | -0/+2 |
| * | Improved the interface of methods commuting operands, improved X86-FMA3 mem-f... | Andrew Kaylor | 2015-09-28 | 1 | -3/+12 |
| * | Pass BranchProbability/BlockMass by value instead of const& as they are small... | Cong Hou | 2015-09-10 | 1 | -3/+3 |
| * | Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) | Alexander Kornienko | 2015-06-23 | 1 | -1/+1 |
| * | Fixed/added namespace ending comments using clang-tidy. NFC | Alexander Kornienko | 2015-06-19 | 1 | -1/+1 |
| * | MachineLICM: Use TargetSchedModel instead of just itineraries | Matthias Braun | 2015-06-13 | 1 | -2/+2 |
| * | [CodeGen] ArrayRef'ize cond/pred in various TII APIs. NFC. | Ahmed Bougacha | 2015-06-11 | 1 | -5/+4 |
| * | MachineInstr: Change return value of getOpcode() to unsigned. | Matthias Braun | 2015-05-18 | 1 | -1/+1 |
| * | Peephole opt needs optimizeSelect() to keep track of newly created MIs | Mehdi Amini | 2015-01-13 | 1 | -1/+3 |
| * | Add Forward Control-Flow Integrity. | Tom Roeder | 2014-11-11 | 1 | -6/+0 |
| * | ARM: allow copying of CPSR when all else fails. | Tim Northover | 2014-10-01 | 1 | -0/+7 |
| * | [ARM] Move the implementation of the target hooks related to copy-related | Quentin Colombet | 2014-08-22 | 1 | -0/+47 |
| * | Canonicalize header guards into a common format. | Benjamin Kramer | 2014-08-13 | 1 | -2/+2 |
| * | [stack protector] Fix a potential security bug in stack protector where the | Akira Hatanaka | 2014-07-25 | 1 | -0/+8 |
| * | The hazard recognizer only needs a subtarget, not a target machine | Eric Christopher | 2014-06-13 | 1 | -1/+1 |
| * | Add a new attribute called 'jumptable' that creates jump-instruction tables f... | Tom Roeder | 2014-06-05 | 1 | -0/+7 |
| * | [C++] Use 'nullptr'. | Craig Topper | 2014-04-28 | 1 | -1/+1 |
| * | Prune includes in ARM target. | Craig Topper | 2014-03-22 | 1 | -1/+1 |
| * | [C++11] Add 'override' keyword to virtual methods that override their base cl... | Craig Topper | 2014-03-10 | 1 | -113/+109 |
| * | ARM: decide whether to use movw/movt based on "minsize" attribute. | Tim Northover | 2013-12-02 | 1 | -1/+2 |
| * | ARM: fold prologue/epilogue sp updates into push/pop for code size | Tim Northover | 2013-11-08 | 1 | -0/+18 |
| * | IfConverter: Use TargetSchedule for instruction latencies | Arnold Schwaighofer | 2013-09-30 | 1 | -0/+2 |
| * | DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineI... | David Blaikie | 2013-06-16 | 1 | -6/+0 |
| * | Don't cache the instruction and register info from the TargetMachine, because | Bill Wendling | 2013-06-07 | 1 | -1/+1 |
| * | ARM: Use ldrd/strd to spill 64-bit pairs when available. | Tim Northover | 2013-04-21 | 1 | -0/+4 |
| * | ARM scheduler model: Swift has varying latencies, uops for simple ALU ops | Arnold Schwaighofer | 2013-04-05 | 1 | -0/+4 |
| * | Sort includes for all of the .h files under the 'lib' tree. These were | Chandler Carruth | 2012-12-04 | 1 | -2/+2 |
| * | misched: Use the TargetSchedModel interface wherever possible. | Andrew Trick | 2012-10-10 | 1 | -4/+0 |
| * | Add LLVM support for Swift. | Bob Wilson | 2012-09-29 | 1 | -0/+7 |
| * | Whitespace. | Bob Wilson | 2012-09-29 | 1 | -1/+1 |
| * | Implement getNumLDMAddresses and expose through ARMBaseInstrInfo. | Andrew Trick | 2012-09-14 | 1 | -0/+3 |
| * | Handle ARM MOVCC optimization in PeepholeOptimizer. | Jakob Stoklund Olesen | 2012-08-16 | 1 | -0/+7 |
| * | Fold predicable instructions into MOVCC / t2MOVCC. | Jakob Stoklund Olesen | 2012-08-15 | 1 | -0/+5 |
| * | Add SrcReg2 to analyzeCompare and optimizeCompareInstr to handle Compare | Manman Ren | 2012-06-29 | 1 | -10/+14 |
| * | misched: API for minimum vs. expected latency. | Andrew Trick | 2012-06-05 | 1 | -2/+3 |
| * | Implement ARMBaseInstrInfo::commuteInstruction() for MOVCCr. | Jakob Stoklund Olesen | 2012-04-04 | 1 | -0/+2 |
| * | ARM implement TargetInstrInfo::getNoopForMachoTarget() | Jim Grosbach | 2012-02-28 | 1 | -0/+3 |
| * | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 | 1 | -1/+1 |
| * | Model ARM predicated write as read-mod-write. e.g. | Evan Cheng | 2011-12-14 | 1 | -0/+4 |
| * | - Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function | Evan Cheng | 2011-12-14 | 1 | -4/+3 |
| * | Move -widen-vmovs to ARMBaseInstrInfo::expandPostRAPseudo(). | Jakob Stoklund Olesen | 2011-10-11 | 1 | -0/+2 |
| * | Implement TII::get/setExecutionDomain() for ARM. | Jakob Stoklund Olesen | 2011-09-27 | 1 | -0/+6 |
| * | Lower ARM adds/subs to add/sub after adding optional CPSR operand. | Andrew Trick | 2011-09-21 | 1 | -0/+9 |
| * | Implement isLoadFromStackSlotPostFE and isStoreToStackSlotPostFE for ARM. | Jakob Stoklund Olesen | 2011-08-08 | 1 | -0/+4 |
| * | Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate A... | Evan Cheng | 2011-07-20 | 1 | -140/+0 |
| * | Add a target-indepedent entry to MCInstrDesc to describe the encoded size of ... | Owen Anderson | 2011-07-13 | 1 | -13/+5 |
| * | Use BranchProbability instead of floating points in IfConverter. | Jakub Staszak | 2011-07-10 | 1 | -4/+4 |
| * | Hide the call to InitMCInstrInfo into tblgen generated ctor. | Evan Cheng | 2011-07-01 | 1 | -1/+4 |
| * | - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and | Evan Cheng | 2011-06-28 | 1 | -6/+6 |
