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| author | Arnold Schwaighofer <aschwaighofer@apple.com> | 2013-04-05 04:42:00 +0000 |
|---|---|---|
| committer | Arnold Schwaighofer <aschwaighofer@apple.com> | 2013-04-05 04:42:00 +0000 |
| commit | 5dde1f39c12b7427a5af592dd5eb5438880fa1b1 (patch) | |
| tree | 31215bfa9982d57919ed58f9a639dfbca2911d5e /llvm/lib/Target/ARM/ARMBaseInstrInfo.h | |
| parent | 61ad74938d3205f77c137a779e42bc0e647cb682 (diff) | |
| download | bcm5719-llvm-5dde1f39c12b7427a5af592dd5eb5438880fa1b1.tar.gz bcm5719-llvm-5dde1f39c12b7427a5af592dd5eb5438880fa1b1.zip | |
ARM scheduler model: Swift has varying latencies, uops for simple ALU ops
llvm-svn: 178842
Diffstat (limited to 'llvm/lib/Target/ARM/ARMBaseInstrInfo.h')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h index 2698132d2d5..7c107bb4195 100644 --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h @@ -314,6 +314,10 @@ public: bool canCauseFpMLxStall(unsigned Opcode) const { return MLxHazardOpcodes.count(Opcode); } + + /// Returns true if the instruction has a shift by immediate that can be + /// executed in one cycle less. + bool isSwiftFastImmShift(const MachineInstr *MI) const; }; static inline |
