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| author | Tim Northover <Tim.Northover@arm.com> | 2013-04-21 11:57:07 +0000 |
|---|---|---|
| committer | Tim Northover <Tim.Northover@arm.com> | 2013-04-21 11:57:07 +0000 |
| commit | 798697d662492386e708bc658e98916f30e3ba29 (patch) | |
| tree | 13af34ebf68980cd150cfac87ab53edee59e1e5d /llvm/lib/Target/ARM/ARMBaseInstrInfo.h | |
| parent | cd4cd6ecc57bfc11e4a92571e8f4284b614cef7f (diff) | |
| download | bcm5719-llvm-798697d662492386e708bc658e98916f30e3ba29.tar.gz bcm5719-llvm-798697d662492386e708bc658e98916f30e3ba29.zip | |
ARM: Use ldrd/strd to spill 64-bit pairs when available.
This allows common sp-offsets to be part of the instruction and is
probably faster on modern CPUs too.
llvm-svn: 179977
Diffstat (limited to 'llvm/lib/Target/ARM/ARMBaseInstrInfo.h')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h index 7c107bb4195..2ef659c23bd 100644 --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h @@ -141,6 +141,10 @@ public: MachineInstr *commuteInstruction(MachineInstr*, bool=false) const; + const MachineInstrBuilder &AddDReg(MachineInstrBuilder &MIB, unsigned Reg, + unsigned SubIdx, unsigned State, + const TargetRegisterInfo *TRI) const; + virtual bool produceSameValue(const MachineInstr *MI0, const MachineInstr *MI1, const MachineRegisterInfo *MRI) const; |
