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path: root/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
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* Don't attempt to use flags from predicated instructions.Jakob Stoklund Olesen2012-09-101-2/+8
* Use predication instead of pseudo-opcodes when folding into MOVCC.Jakob Stoklund Olesen2012-09-051-56/+31
* Strip old MachineInstrs *after* we know we can put them back.Tim Northover2012-09-051-6/+6
* Limit domain conversion to cases where it won't break dep chains.Tim Northover2012-09-011-12/+48
* Add support for moving pure S-register to NEON pipeline if desiredTim Northover2012-08-301-2/+71
* Refactor setExecutionDomain to be clearer about what it's doing and more robust.Tim Northover2012-08-291-45/+53
* Cleanup sloppy code. Jakob's review.Andrew Trick2012-08-291-4/+3
* Fix ARM vector copies of overlapping register tuples.Andrew Trick2012-08-291-0/+13
* cleanupAndrew Trick2012-08-291-21/+19
* Revert r162713: "Add ATOMIC_LDR* pseudo-instructions to model atomic_load on ...Jakob Stoklund Olesen2012-08-281-10/+10
* Add ATOMIC_LDR* pseudo-instructions to model atomic_load on ARM.Jakob Stoklund Olesen2012-08-271-10/+10
* Make sure we add the predicate after all of the registers are added.Bill Wendling2012-08-271-2/+3
* Add a missing def flag.Jakob Stoklund Olesen2012-08-211-4/+2
* Avoid folding ADD instructions with FI operands.Jakob Stoklund Olesen2012-08-171-0/+3
* Implement NEON domain switching for scalar <-> S-register vmovs on ARMTim Northover2012-08-171-15/+97
* Add ADD and SUB to the predicable ARM instructions.Jakob Stoklund Olesen2012-08-161-0/+20
* Handle ARM MOVCC optimization in PeepholeOptimizer.Jakob Stoklund Olesen2012-08-161-3/+64
* Fold predicable instructions into MOVCC / t2MOVCC.Jakob Stoklund Olesen2012-08-151-0/+49
* Recognize vst1.64 / vld1.64 with 3 and 4 regs as load from / store to stack s...Anton Korobeynikov2012-08-041-0/+4
* Add stack spill / reload instructions for DTriple and DQuad register classes,...Anton Korobeynikov2012-08-041-3/+43
* Fix a typo (the the => the)Sylvestre Ledru2012-07-231-1/+1
* ARM: fix typo in commentsManman Ren2012-07-111-1/+1
* ARM: Fix optimizeCompare to correctly check safe condition.Manman Ren2012-07-111-9/+14
* Revert accidental checkin.Andrew Trick2012-07-021-3/+2
* Reapply "Make NumMicroOps a variable in the subtarget's instruction itinerary."Andrew Trick2012-07-021-10/+11
* ARM: Clean up optimizeCompare in peephole, no functional change.Manman Ren2012-06-291-80/+73
* Add SrcReg2 to analyzeCompare and optimizeCompareInstr to handle CompareManman Ren2012-06-291-14/+21
* Revert "Make NumMicroOps a variable in the subtarget's instruction itinerary."Andrew Trick2012-06-291-9/+9
* Make NumMicroOps a variable in the subtarget's instruction itinerary.Andrew Trick2012-06-291-9/+9
* Add a missing check to avoid dereference null. No sensible test case possible...Evan Cheng2012-06-261-0/+2
* ARM: update peephole optimization.Manman Ren2012-06-251-2/+18
* ARM scheduling fix: don't guess at implicit operand latency.Andrew Trick2012-06-221-5/+9
* ARM scheduling fix: compute predicated implicit use properly.Andrew Trick2012-06-221-3/+1
* Continue factoring computeOperandLatency. Use it for ARM hasHighOperandLatency.Andrew Trick2012-06-071-1/+2
* ARM getOperandLatency rewrite.Andrew Trick2012-06-071-85/+112
* ARM getOperandLatency should return -1 for unknown, consistent with APIAndrew Trick2012-06-071-1/+4
* Fix ARM getInstrLatency logic to work with the current API.Andrew Trick2012-06-071-13/+19
* misched: API for minimum vs. expected latency.Andrew Trick2012-06-051-8/+11
* Mark a static table as const. Shrink opcode size in static tables to uint16_t...Craig Topper2012-05-241-14/+9
* Fix use of uninitialized variable.David Blaikie2012-05-141-1/+1
* Add space before an open parenthesis in control flow statements.Manman Ren2012-05-111-2/+2
* ARM: peephole optimization to remove cmp instructionManman Ren2012-05-111-27/+119
* Revert: 156550 "ARM: peephole optimization to remove cmp instruction"Manman Ren2012-05-101-118/+27
* ARM: peephole optimization to remove cmp instructionManman Ren2012-05-101-27/+118
* Implement ARMBaseInstrInfo::commuteInstruction() for MOVCCr.Jakob Stoklund Olesen2012-04-041-0/+23
* Handle register copies for the new ARM register classes.Jakob Stoklund Olesen2012-03-291-19/+41
* Spill DPair registers, not just QPR.Jakob Stoklund Olesen2012-03-281-2/+2
* ARM has a peephole optimization which looks for a def / use pair. The defEvan Cheng2012-03-261-0/+19
* Prune includes and replace uses of ARMRegisterInfo.h with ARMBaeRegisterInfo.hCraig Topper2012-03-261-1/+1
* ARM refactor more NEON VLD/VST instructions to use composite physregsJim Grosbach2012-03-061-18/+18
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