| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Convert assert(0) to llvm_unreachable | Craig Topper | 2012-02-07 | 1 | -3/+1 |
| * | DefinesPredicate should only look for def operands. Patch by Ludwig Meier. | Evan Cheng | 2012-02-05 | 1 | -1/+1 |
| * | More dead code removal (using -Wunreachable-code) | David Blaikie | 2012-01-20 | 1 | -85/+81 |
| * | Reapply r146997, "Heed spill slot alignment on ARM." | Jakob Stoklund Olesen | 2012-01-05 | 1 | -2/+3 |
| * | Revert r146997, "Heed spill slot alignment on ARM." | Jakob Stoklund Olesen | 2012-01-03 | 1 | -3/+2 |
| * | ARM NEON assmebly parsing for VLD2 to all lanes instructions. | Jim Grosbach | 2011-12-21 | 1 | -6/+12 |
| * | Heed spill slot alignment on ARM. | Jakob Stoklund Olesen | 2011-12-20 | 1 | -2/+3 |
| * | Model ARM predicated write as read-mod-write. e.g. | Evan Cheng | 2011-12-14 | 1 | -14/+41 |
| * | - Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function | Evan Cheng | 2011-12-14 | 1 | -8/+129 |
| * | ARM assembly parsing and encoding for VLD2 with writeback. | Jim Grosbach | 2011-12-09 | 1 | -12/+24 |
| * | Add bundle aware API for querying instruction properties and switch the code | Evan Cheng | 2011-12-07 | 1 | -12/+11 |
| * | Revert r145971: "Use conservative size estimate for tBR_JTr." | Jakob Stoklund Olesen | 2011-12-06 | 1 | -3/+3 |
| * | First chunk of MachineInstr bundle support. | Evan Cheng | 2011-12-06 | 1 | -2/+1 |
| * | Use conservative size estimate for tBR_JTr. | Jakob Stoklund Olesen | 2011-12-06 | 1 | -3/+3 |
| * | ARM parsing for VLD1 all lanes, with writeback. | Jim Grosbach | 2011-11-30 | 1 | -6/+12 |
| * | Enable -widen-vmovs by default. | Jakob Stoklund Olesen | 2011-11-15 | 1 | -1/+1 |
| * | Make use of MachinePointerInfo::getFixedStack. This removes all mention | Jay Foad | 2011-11-15 | 1 | -4/+2 |
| * | ARM assembly parsing and encoding for VLD1 with writeback. | Jim Grosbach | 2011-10-25 | 1 | -1/+2 |
| * | Nuke dead code. Nothing generates the VLD1d64QPseudo_UPD instruction. | Jim Grosbach | 2011-10-24 | 1 | -1/+0 |
| * | ARM assembly parsing and encoding for VLD1 w/ writeback. | Jim Grosbach | 2011-10-24 | 1 | -2/+2 |
| * | ARM refactor am6offset usage for VLD1. | Jim Grosbach | 2011-10-24 | 1 | -8/+16 |
| * | Use ARM/t2PseudoInst class from ARM/Thumb2 special adds/subs patterns. | Andrew Trick | 2011-10-18 | 1 | -1/+0 |
| * | Fix -widen-vmovs liveness issues. | Jakob Stoklund Olesen | 2011-10-12 | 1 | -3/+29 |
| * | Move -widen-vmovs to ARMBaseInstrInfo::expandPostRAPseudo(). | Jakob Stoklund Olesen | 2011-10-11 | 1 | -30/+42 |
| * | Use the ARMConstantPoolMBB class to handle the MBB values. | Bill Wendling | 2011-10-01 | 1 | -3/+3 |
| * | Use the new ARMConstantPoolSymbol class to handle external symbols. | Bill Wendling | 2011-10-01 | 1 | -2/+3 |
| * | Switch over to using ARMConstantPoolConstant for global variables, functions, | Bill Wendling | 2011-10-01 | 1 | -6/+8 |
| * | Create a machine basic block in the constant pool and retrieve the symbol for... | Bill Wendling | 2011-09-29 | 1 | -0/+4 |
| * | Use ExecutionDepsFix instead of NEONMoveFix. | Jakob Stoklund Olesen | 2011-09-29 | 1 | -10/+20 |
| * | Implement TII::get/setExecutionDomain() for ARM. | Jakob Stoklund Olesen | 2011-09-27 | 1 | -0/+53 |
| * | Lower ARM adds/subs to add/sub after adding optional CPSR operand. | Andrew Trick | 2011-09-21 | 1 | -0/+60 |
| * | whitespace | Andrew Trick | 2011-09-21 | 1 | -4/+4 |
| * | Fix an ambiguously nested if. | Owen Anderson | 2011-09-09 | 1 | -2/+2 |
| * | Thumb unconditional branches are allowed in IT blocks, and therefore should h... | Owen Anderson | 2011-09-09 | 1 | -3/+10 |
| * | Put VMOVS widening under a command line option, off by default. | Jakob Stoklund Olesen | 2011-08-31 | 1 | -1/+6 |
| * | Clean up Thumb load/store multiple definitions. | Jim Grosbach | 2011-08-23 | 1 | -2/+0 |
| * | Remove the VMOVQQ pseudo instruction. | Chad Rosier | 2011-08-20 | 1 | -8/+8 |
| * | Add <imp-def> operands to QQ and QQQQ stack loads. | Jakob Stoklund Olesen | 2011-08-20 | 1 | -2/+4 |
| * | VMOVQQQQs pseudo instructions are only created by ARMBaseInstrInfo::copyPhysReg. | Chad Rosier | 2011-08-20 | 1 | -10/+31 |
| * | Rewrite some ARM InstrInfo functions to be most accepting of arbitrary regist... | Owen Anderson | 2011-08-10 | 1 | -110/+115 |
| * | Promote VMOVS to VMOVD when possible. | Jakob Stoklund Olesen | 2011-08-09 | 1 | -2/+29 |
| * | Implement isLoadFromStackSlotPostFE and isStoreToStackSlotPostFE for ARM. | Jakob Stoklund Olesen | 2011-08-08 | 1 | -0/+12 |
| * | Split up the ARM so_reg ComplexPattern into so_reg_reg and so_reg_imm, allowi... | Owen Anderson | 2011-07-21 | 1 | -1/+1 |
| * | Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate A... | Evan Cheng | 2011-07-20 | 1 | -1/+2 |
| * | Remove VMOVDneon and VMOVQ, which are just aliases for VORR. This continues ... | Owen Anderson | 2011-07-15 | 1 | -1/+3 |
| * | Next round of MC refactoring. This patch factor MC table instantiations, MC | Evan Cheng | 2011-07-14 | 1 | -1/+0 |
| * | Add a target-indepedent entry to MCInstrDesc to describe the encoded size of ... | Owen Anderson | 2011-07-13 | 1 | -17/+3 |
| * | Use BranchProbability instead of floating points in IfConverter. | Jakub Staszak | 2011-07-10 | 1 | -15/+23 |
| * | Hide the call to InitMCInstrInfo into tblgen generated ctor. | Evan Cheng | 2011-07-01 | 1 | -2/+2 |
| * | Refactor away tSpill and tRestore pseudos in ARM backend. | Jim Grosbach | 2011-06-29 | 1 | -2/+2 |
