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authorDavid Green <david.green@arm.com>2020-01-06 10:58:14 +0000
committerDavid Green <david.green@arm.com>2020-01-06 16:38:49 +0000
commit0eb981b8ce70d07b1b1fb39b969a6fe9509840c1 (patch)
tree67b75092453408629ed9f98d356396107a697db7 /llvm/lib/Target/ARM
parent61b5e727b7ccfca7e0cbb0ed70f9e828cd1514bd (diff)
downloadbcm5719-llvm-0eb981b8ce70d07b1b1fb39b969a6fe9509840c1.tar.gz
bcm5719-llvm-0eb981b8ce70d07b1b1fb39b969a6fe9509840c1.zip
[ARM] Use correct TRAP opcode for thumb in FastISel
We were previously unconditionally using the ARM::TRAP opcode, even under Thumb. My understanding is that these are essentially the same thing (they both result in a trap under Thumb), but the ARM::TRAP opcode is marked as requiring IsARM, so it is more correct to use ARM::tTRAP. Differential Revision: https://reviews.llvm.org/D72075
Diffstat (limited to 'llvm/lib/Target/ARM')
-rw-r--r--llvm/lib/Target/ARM/ARMFastISel.cpp8
1 files changed, 6 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp
index 6c204bc0ed5..6e19db3c7e2 100644
--- a/llvm/lib/Target/ARM/ARMFastISel.cpp
+++ b/llvm/lib/Target/ARM/ARMFastISel.cpp
@@ -2566,8 +2566,12 @@ bool ARMFastISel::SelectIntrinsicCall(const IntrinsicInst &I) {
return SelectCall(&I, "memset");
}
case Intrinsic::trap: {
- BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(
- Subtarget->useNaClTrap() ? ARM::TRAPNaCl : ARM::TRAP));
+ unsigned Opcode;
+ if (Subtarget->isThumb())
+ Opcode = ARM::tTRAP;
+ else
+ Opcode = Subtarget->useNaClTrap() ? ARM::TRAPNaCl : ARM::TRAP;
+ BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opcode));
return true;
}
}
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