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path: root/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
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* AMDGPU/SI: Limit load clustering to 16 bytes instead of 4 instructionsTom Stellard2016-03-281-8/+33
* AMDGPU: Add SIWholeQuadMode passNicolai Haehnle2016-03-211-0/+13
* AMDGPU/SI: Clean up indentation in SIInstrInfo::getDefaultRsrcDataFormatMichel Danzer2016-03-161-3/+3
* [AMDGPU] Assembler: change v_madmk operands to have same order as mad.Nikolay Haustov2016-03-111-15/+2
* [TII] Allow getMemOpBaseRegImmOfs() to accept negative offsets. NFC.Chad Rosier2016-03-091-3/+3
* AMDGPU/SI: Add support for spiling SGPRs to scratch bufferTom Stellard2016-03-041-0/+2
* AMDGPU: Simplify boolean conditional return statementsMatt Arsenault2016-03-021-13/+6
* AMDGPU: Cleanup suggested in bug 23960Matt Arsenault2016-03-021-6/+3
* AMDGPU/SI: Implement DS_PERMUTE/DS_BPERMUTE Instruction Definitions and Intri...Changpeng Fang2016-03-011-0/+4
* AMDGPU/SI: Use v_readfirstlane to legalize SMRD with VGPR base pointerTom Stellard2016-02-201-229/+20
* [AMDGPU] Rename $dst operand to $vdst for VOP instructions.Tom Stellard2016-02-161-1/+1
* AMDGPU/SI: Detect uniform branches and emit s_cbranch instructionsTom Stellard2016-02-121-10/+59
* AMDGPU: Set element_size in private resource descriptorMatt Arsenault2016-02-121-0/+4
* AMDGPU/SI: Make sure MIMG descriptors and samplers stay in SGPRsTom Stellard2016-02-111-0/+42
* AMDGPU/SI: When splitting SMRD instructions, add its users to VALU worklistTom Stellard2016-02-111-0/+2
* AMDGPU: Fix constant bus use check with subregistersMatt Arsenault2016-02-111-4/+8
* AMDGPU: Remove some purely R600 functions from AMDGPUInstrInfoTom Stellard2016-02-051-42/+0
* AMDGPU: Move subtarget specific code out of AMDGPUInstrInfo.cppTom Stellard2016-01-281-19/+11
* AMDGPU/SI: Add SI Machine SchedulerNicolai Haehnle2016-01-131-0/+12
* AMDGPU/SI: Fold operands with sub-registersNicolai Haehnle2016-01-071-0/+4
* AMDGPU/SI: use S_MOV_B64 for larger copies in copyPhysRegNicolai Haehnle2015-12-191-6/+22
* AMDGPU: fix overlapping copies in copyPhysRegNicolai Haehnle2015-12-191-9/+24
* AMDGPU/SI: Test commitChangpeng Fang2015-12-181-1/+1
* Revert "AMDGPU/SI: Test commit"Changpeng Fang2015-12-181-1/+1
* AMDGPU/SI: Test commitChangpeng Fang2015-12-181-1/+1
* AMDGPU: Fix off-by-one in SIRegisterInfo::eliminateFrameIndexNicolai Haehnle2015-12-171-2/+2
* AMDGPU/SI: Emit constant arrays in the .text sectionTom Stellard2015-12-101-20/+28
* AMDGPU: Optimize VOP2 operand legalizationMatt Arsenault2015-12-011-45/+125
* AMDGPU: Rework how private buffer passed for HSAMatt Arsenault2015-11-301-10/+4
* AMDGPU: Rename enums to be consistent with HSA code object terminologyMatt Arsenault2015-11-301-8/+11
* AMDGPU: Remove SIPrepareScratchRegsMatt Arsenault2015-11-301-8/+10
* AMDGPU/SI: select S_ABS_I32 when possible (v2)Marek Olsak2015-11-251-0/+29
* AMDGPU: Create emergency stack slots during frame loweringMatt Arsenault2015-11-061-0/+1
* AMDGPU: Remove unused scratch resource operandsMatt Arsenault2015-11-061-72/+129
* AMDGPU: Fix hardcoded alignment of spill.Matt Arsenault2015-11-061-2/+1
* AMDGPU: Also track whether SGPRs were spilledMatt Arsenault2015-11-051-0/+2
* AMDGPU: Fix assert when legalizing atomic operandsMatt Arsenault2015-11-051-15/+51
* AMDGPU: Make findUsedSGPR more readableMatt Arsenault2015-11-031-7/+18
* AMDGPU: Simplify VOP3 operand legalization.Matt Arsenault2015-10-211-41/+49
* AMDGPU: Fix not checking implicit operands in verifyInstructionMatt Arsenault2015-10-211-15/+29
* AMDGPU: Add MachineInstr overloads for instruction format testsMatt Arsenault2015-10-201-30/+26
* AMDGPU: Use explicit register size indirect pseudosMatt Arsenault2015-10-071-1/+1
* AMDGPU/SI: Add verifier check for exec readsMatt Arsenault2015-10-021-0/+10
* AMDGPU/SI: Don't set DATA_FORMAT if ADD_TID_ENABLE is setMarek Olsak2015-09-291-0/+13
* AMDGPU: Factor switch into separate functionMatt Arsenault2015-09-281-21/+27
* AMDGPU: Fix splitting x16 SMRD loadsMatt Arsenault2015-09-281-2/+2
* AMDGPU: Fix moving SMRD loads with literal offsets on CIMatt Arsenault2015-09-281-3/+9
* AMDGPU: Fix splitting SMRD with large offsetMatt Arsenault2015-09-281-1/+1
* Improved the interface of methods commuting operands, improved X86-FMA3 mem-f...Andrew Kaylor2015-09-281-16/+37
* AMDGPU: Construct new buffer instruction when moving SMRDMatt Arsenault2015-09-251-30/+37
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