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| author | Nicolai Haehnle <nhaehnle@gmail.com> | 2016-01-13 16:10:10 +0000 |
|---|---|---|
| committer | Nicolai Haehnle <nhaehnle@gmail.com> | 2016-01-13 16:10:10 +0000 |
| commit | 02c3291566ff670d3fe1a7a20ba866cbe4c48266 (patch) | |
| tree | 4b2d52c026b4b068b0dad6408a06cdab7e5bca95 /llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | |
| parent | 26ec8acc847ce0a5905452e987addae726358eed (diff) | |
| download | bcm5719-llvm-02c3291566ff670d3fe1a7a20ba866cbe4c48266.tar.gz bcm5719-llvm-02c3291566ff670d3fe1a7a20ba866cbe4c48266.zip | |
AMDGPU/SI: Add SI Machine Scheduler
Summary:
It is off by default, but can be used
with --misched=si
Patch by: Axel Davy
Reviewers: arsenm, tstellarAMD, nhaehnle
Subscribers: nhaehnle, solenskiner, arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D11885
llvm-svn: 257609
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIInstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp index bd80756d5c8..1e10d25e8fb 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp @@ -3079,3 +3079,15 @@ uint64_t SIInstrInfo::getScratchRsrcWords23() const { return Rsrc23; } + +bool SIInstrInfo::isLowLatencyInstruction(const MachineInstr *MI) const { + unsigned Opc = MI->getOpcode(); + + return isSMRD(Opc); +} + +bool SIInstrInfo::isHighLatencyInstruction(const MachineInstr *MI) const { + unsigned Opc = MI->getOpcode(); + + return isMUBUF(Opc) || isMTBUF(Opc) || isMIMG(Opc); +} |
