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path: root/llvm/lib/Target/AMDGPU/SIInstrFormats.td
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* [AMDGPU] Added MI bit IsDOTStanislav Mekhanoshin2019-09-171-0/+5
* [AMDGPU] Extend MIMG opcode to 8 bitsStanislav Mekhanoshin2019-07-121-2/+3
* [AMDGPU] gfx908 mAI instructions, MC partStanislav Mekhanoshin2019-07-091-0/+5
* [AMDGPU] hazard recognizer for fp atomic to s_denorm_modeStanislav Mekhanoshin2019-06-211-0/+5
* [AMDGPU] gfx1010 MIMG implementationStanislav Mekhanoshin2019-05-011-6/+26
* [AMDGPU] predicate and feature refactoringStanislav Mekhanoshin2019-04-051-6/+7
* AMDGPU: Remove GCN features and predicatesMatt Arsenault2019-02-081-5/+0
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [AMDGPU] Add new Mode Register passTim Corringham2018-12-101-0/+6
* AMDGPU: Refactor Subtarget classesTom Stellard2018-07-111-2/+2
* [AMDGPU] Add VALU to V_INTERP InstructionsRyan Taylor2018-07-051-0/+1
* AMDGPU: Separate R600 and GCN TableGen filesTom Stellard2018-06-281-1/+1
* AMDGPU: Refactor MIMG instruction TableGen using generic tablesNicolai Haehnle2018-06-211-14/+0
* AMDGPU: Turn D16 for MIMG instructions into a regular operandNicolai Haehnle2018-06-211-4/+6
* [MachineOperand][Target] MachineOperand::isRenamable semantics changesGeoff Berry2018-02-231-2/+3
* [AMDGPU] isRenamable fixes to support copy forwardingGeoff Berry2018-01-301-0/+2
* AMDGPU/SI: Add d16 support for image intrinsics.Changpeng Fang2018-01-181-0/+7
* [AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/su...Dmitry Preobrazhensky2017-11-201-4/+4
* [AMDGPU][MC][GFX9][disassembler] Corrected decoding of op_sel_hi for v_mad_mix*Dmitry Preobrazhensky2017-11-171-0/+5
* AMDGPU: Remove global isGCN predicatesMatt Arsenault2017-10-031-0/+9
* AMDGPU: Fold clamp modifier for packed instructionsMatt Arsenault2017-08-311-8/+19
* [AMDGPU][MC][GFX9] Added integer clamping support for VOP3 opcodesDmitry Preobrazhensky2017-08-161-0/+5
* [AMDGPU][MC][GFX9] Added 16-bit renamed and "_legacy" VALU opcodesDmitry Preobrazhensky2017-08-091-0/+5
* AMDGPU: Introduce maybeAtomic instruction flagKonstantin Zhuravlyov2017-07-211-1/+6
* [AMDGPU][MC][GFX9] Added support of VOP3 'op_sel' modifierDmitry Preobrazhensky2017-07-211-0/+5
* [AMDGPU][MC] Fixed bugs in export instructionDmitry Preobrazhensky2017-05-191-8/+8
* AMDGPU: Unify divergent function exits.Matt Arsenault2017-03-241-6/+6
* AMDGPU: Add VOP3P instruction formatMatt Arsenault2017-02-271-0/+2
* AMDGPU: Fold FP clamp as modifier bitMatt Arsenault2017-02-221-0/+5
* AMDGPU: Fix vintrp disassemblyMatt Arsenault2016-12-101-1/+1
* AMDGPU: Clean up instruction bitsMatt Arsenault2016-12-091-42/+55
* AMDGPU/SI: Don't mark VINTRP instructions as mayLoadTom Stellard2016-12-091-1/+13
* AMDGPU: Refactor exp instructionsMatt Arsenault2016-12-051-9/+22
* [AMDGPU] TableGen: change individual instruction flags to bit type from bits<1>Sam Kolton2016-11-151-35/+35
* AMDGPU: Workaround for instruction size with literalsMatt Arsenault2016-11-011-0/+5
* AMDGPU: Add definitions for scalar store instructionsMatt Arsenault2016-10-281-0/+6
* [AMDGPU] Refactor VOP1 and VOP2 instruction TD definitionsValery Pykhtin2016-09-231-166/+0
* [AMDGPU] Refactor VOPC instruction TD definitionsValery Pykhtin2016-09-191-29/+0
* AMDGPU: Allow some control flow intrinsics to be CSEdMatt Arsenault2016-09-161-0/+3
* AMDGPU: Use SOPK compare instructionsMatt Arsenault2016-09-161-0/+5
* Revert "AMDGPU: Use SOPK compare instructions"Matt Arsenault2016-09-141-5/+0
* AMDGPU: Use SOPK compare instructionsMatt Arsenault2016-09-141-0/+5
* [AMDGPU] Refactor MUBUF/MTBUF instructionsValery Pykhtin2016-09-101-93/+0
* AMDGPU: Implement is{LoadFrom|StoreTo}FrameIndexMatt Arsenault2016-09-101-3/+5
* [AMDGPU] Assembler: match e32 VOP instructions before e64.Sam Kolton2016-09-091-0/+3
* [AMDGPU] Refactor FLAT TD instructionsValery Pykhtin2016-09-051-36/+0
* [AMDGPU] Scalar Memory instructions TD refactoringValery Pykhtin2016-09-011-54/+0
* [AMDGPU] Refactor SOP instructions TD files.Valery Pykhtin2016-08-301-126/+0
* AMDGPU: Remove unneeded implicit exec uses/defsMatt Arsenault2016-08-271-0/+19
* AMDGPU: Stay in WQM for non-intrinsic storesNicolai Haehnle2016-08-021-0/+6
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