diff options
| author | Geoff Berry <gberry@codeaurora.org> | 2018-01-30 17:37:39 +0000 |
|---|---|---|
| committer | Geoff Berry <gberry@codeaurora.org> | 2018-01-30 17:37:39 +0000 |
| commit | 1d531013876c02b18df678a5f67d6a7d94e392b9 (patch) | |
| tree | 0fd9364d1502ac5a80d423a64e1dcd987ac5e6ac /llvm/lib/Target/AMDGPU/SIInstrFormats.td | |
| parent | c9265e81f491a3fc1b7b02920479bd34b236fac9 (diff) | |
| download | bcm5719-llvm-1d531013876c02b18df678a5f67d6a7d94e392b9.tar.gz bcm5719-llvm-1d531013876c02b18df678a5f67d6a7d94e392b9.zip | |
[AMDGPU] isRenamable fixes to support copy forwarding
Mark more opcodes as hasExtraSrcRegAllocReq so that their operands will
be marked as not renamable, to avoid copy forwarding violating the
constraint that only one operand may use the constant bus.
These changes fix a few mis-compiles when copy forwarding is enabled in
MachineCopyPropagation by D41835 (and were reviewed as part of that change).
llvm-svn: 323794
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIInstrFormats.td')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrFormats.td | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrFormats.td b/llvm/lib/Target/AMDGPU/SIInstrFormats.td index af9908b9846..9e7aea6705f 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrFormats.td +++ b/llvm/lib/Target/AMDGPU/SIInstrFormats.td @@ -203,6 +203,8 @@ class VPseudoInstSI<dag outs, dag ins, list<dag> pattern = [], string asm = ""> : PseudoInstSI<outs, ins, pattern, asm> { let VALU = 1; let Uses = [EXEC]; + // Avoid changing source registers in a way that violates constant bus read limitations. + let hasExtraSrcRegAllocReq = 1; } class CFPseudoInstSI<dag outs, dag ins, list<dag> pattern = [], |
