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| author | Sam Kolton <Sam.Kolton@amd.com> | 2016-09-09 09:37:51 +0000 |
|---|---|---|
| committer | Sam Kolton <Sam.Kolton@amd.com> | 2016-09-09 09:37:51 +0000 |
| commit | d63d8a7c05950d7289ec2daaa526d63772bd3598 (patch) | |
| tree | 35816432d893f988e80ab7d8bbbad8ce0e26ecdb /llvm/lib/Target/AMDGPU/SIInstrFormats.td | |
| parent | 8efa9790290d29931df95056b5b76fc0c3373e73 (diff) | |
| download | bcm5719-llvm-d63d8a7c05950d7289ec2daaa526d63772bd3598.tar.gz bcm5719-llvm-d63d8a7c05950d7289ec2daaa526d63772bd3598.zip | |
[AMDGPU] Assembler: match e32 VOP instructions before e64.
Summary:
Split assembler match table in 4 tables with assembler variants:
Default - all instructions except VOP3, SDWA and DPP
- VOP3
- SDWA
- DPP
First match Default table then VOP3, SDWA and DPP.
Reviewers: tstellarAMD, artem.tamazov, vpykhtin
Subscribers: arsenm, wdng, nhaehnle, AMDGPU
Differential Revision: https://reviews.llvm.org/D24252
llvm-svn: 281023
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIInstrFormats.td')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrFormats.td | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrFormats.td b/llvm/lib/Target/AMDGPU/SIInstrFormats.td index 9e18784e07a..16f5e8abb38 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrFormats.td +++ b/llvm/lib/Target/AMDGPU/SIInstrFormats.td @@ -95,6 +95,7 @@ class InstSI <dag outs, dag ins, string asm = "", field bits<1> DisableDecoder = 0; let isAsmParserOnly = !if(!eq(DisableDecoder{0}, {0}), 0, 1); + let AsmVariantName = AMDGPUAsmVariants.Default; } class PseudoInstSI<dag outs, dag ins, list<dag> pattern = []> @@ -187,6 +188,8 @@ class VOP3Common <dag outs, dag ins, string asm = "", "cvtVOP3", !if(!eq(HasMods,1), "cvtVOP3_2_mod", "")); + let AsmVariantName = AMDGPUAsmVariants.VOP3; + let isCodeGenOnly = 0; int Size = 8; |
