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| author | Tom Stellard <tstellar@redhat.com> | 2018-05-24 05:28:34 +0000 |
|---|---|---|
| committer | Tom Stellard <tstellar@redhat.com> | 2018-05-24 05:28:34 +0000 |
| commit | 1b95fed6f7e106bf49fd075dc584069d8ba83e59 (patch) | |
| tree | 3dad6cd7724475a9ca0e89648f33224e7f1f73bf /llvm/lib/Target/AMDGPU/R600ISelLowering.cpp | |
| parent | 361941283ffecf4544cf86aa952ff882a37841be (diff) | |
| download | bcm5719-llvm-1b95fed6f7e106bf49fd075dc584069d8ba83e59.tar.gz bcm5719-llvm-1b95fed6f7e106bf49fd075dc584069d8ba83e59.zip | |
AMDGPU/R600: Remove code for handling AMDGPUISD::CLAMP
Summary:
We don't generate AMDGPUISD::CLAMP for R600 now that llvm.AMDGPU.clamp
is gone.
Reviewers: arsenm, nhaehnle
Reviewed By: arsenm
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D47181
llvm-svn: 333153
Diffstat (limited to 'llvm/lib/Target/AMDGPU/R600ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/R600ISelLowering.cpp | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp index 502d754af48..75cefdc965c 100644 --- a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp @@ -287,13 +287,6 @@ R600TargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI, return AMDGPUTargetLowering::EmitInstrWithCustomInserter(MI, BB); } break; - case AMDGPU::CLAMP_R600: { - MachineInstr *NewMI = TII->buildDefaultInstruction( - *BB, I, AMDGPU::MOV, MI.getOperand(0).getReg(), - MI.getOperand(1).getReg()); - TII->addFlag(*NewMI, 0, MO_FLAG_CLAMP); - break; - } case AMDGPU::FABS_R600: { MachineInstr *NewMI = TII->buildDefaultInstruction( @@ -2180,20 +2173,6 @@ SDNode *R600TargetLowering::PostISelFolding(MachineSDNode *Node, if (FoldOperand(Node, i, Src, FakeOp, FakeOp, FakeOp, FakeOp, DAG)) return DAG.getMachineNode(Opcode, SDLoc(Node), Node->getVTList(), Ops); } - } else if (Opcode == AMDGPU::CLAMP_R600) { - SDValue Src = Node->getOperand(0); - if (!Src.isMachineOpcode() || - !TII->hasInstrModifiers(Src.getMachineOpcode())) - return Node; - int ClampIdx = TII->getOperandIdx(Src.getMachineOpcode(), - AMDGPU::OpName::clamp); - if (ClampIdx < 0) - return Node; - SDLoc DL(Node); - std::vector<SDValue> Ops(Src->op_begin(), Src->op_end()); - Ops[ClampIdx - 1] = DAG.getTargetConstant(1, DL, MVT::i32); - return DAG.getMachineNode(Src.getMachineOpcode(), DL, - Node->getVTList(), Ops); } else { if (!TII->hasInstrModifiers(Opcode)) return Node; |

