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path: root/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
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* [Disassembler] Delete the VStream parameter of MCDisassembler::getInstruction()Fangrui Song2020-01-111-1/+1
* [AMDGPU] gfx908 register file changesStanislav Mekhanoshin2019-07-091-0/+11
* [AMDGPU] gfx1010 disassembler changes for wave32Stanislav Mekhanoshin2019-06-181-0/+2
* [AMDGPU] gfx1010 dpp16 and dpp8Stanislav Mekhanoshin2019-06-121-1/+2
* MC: Allow getMaxInstLength to depend on the subtargetMatt Arsenault2019-05-221-3/+2
* [AMDGPU] gfx1010 sgpr register changesStanislav Mekhanoshin2019-04-241-0/+1
* [AMDGPU][MC] Enable lds_direct operand for v_readfirstlane_b32, v_readlane_b3...Dmitry Preobrazhensky2019-03-041-0/+3
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [AMDGPU][MC] Added support of 256- and 512-bit tuples of ttmp registersDmitry Preobrazhensky2017-12-221-0/+3
* AMDGPU: Partially fix disassembly of MIMG instructionsMatt Arsenault2017-12-131-3/+9
* [AMDGPU][MC][GFX9] Corrected encoding of ttmp registers, disabled tba/tmaDmitry Preobrazhensky2017-12-111-1/+6
* [AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use war...Eugene Zelenko2017-08-101-5/+3
* AMDGPU: Add instruction definitions for some scratch_* instructionsMatt Arsenault2017-07-211-0/+1
* [AMDGPU][MC] Corrected disassembler for proper decoding of v_mqsad_u32_u8Dmitry Preobrazhensky2017-07-181-0/+1
* [AMDGPU] SDWA: merge VI and GFX9 pseudo instructionsSam Kolton2017-06-211-4/+6
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-1/+1
* [AMDGPU] SDWA: add disassembler support for GFX9Sam Kolton2017-05-261-0/+5
* [AMDGPU][MC] Corrected disassembler to decode instructions with 2 literalsDmitry Preobrazhensky2017-05-191-0/+2
* AMDGPU: Add VOP3P instruction formatMatt Arsenault2017-02-271-0/+2
* AMDGPU: Fix handling of 16-bit immediatesMatt Arsenault2016-12-101-1/+3
* [AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What Yo...Eugene Zelenko2016-12-091-4/+9
* AMDGPU: Disallow exec as SMEM instruction operandMatt Arsenault2016-11-291-1/+2
* AMDGPU: Replace assert(false) with unreachableMatt Arsenault2016-11-151-3/+1
* AMDGPU: Whitespace fixesMatt Arsenault2016-11-011-1/+1
* [AMDGPU] Disassembler: print label names in branch instructionsSam Kolton2016-10-061-66/+97
* Revert "[AMDGPU] Disassembler: print label names in branch instructions"Sam Kolton2016-09-261-97/+66
* [AMDGPU] Disassembler: print label names in branch instructionsSam Kolton2016-09-261-66/+97
* [AMDGPU][llvm-mc] Disassembler: support for TTMP/TBA/TMA registers.Artem Tamazov2016-05-241-2/+11
* Fixed/Recommitted r267733 "[AMDGPU][llvm-mc] Add support of TTMP quads. Rewor...Artem Tamazov2016-04-291-1/+1
* Revert "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for ...Chad Rosier2016-04-271-1/+0
* [AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD.Artem Tamazov2016-04-271-0/+1
* [NFC] Header cleanupMehdi Amini2016-04-181-0/+1
* [AMDGPU] Disassembler code refactored + error messages.Nikolay Haustov2016-03-011-38/+41
* [AMDGPU] Disassembler: Support for all VOP1 instructions.Nikolay Haustov2016-02-251-12/+35
* [AMDGPU] Disassembler: Added basic disassembler for AMDGPU targetTom Stellard2016-02-181-0/+57
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